[PATCH 1/5] drm: Add new DCS commands in the enum list

[PATCH 1/5] drm: Add new DCS commands in the enum list

[Deepak M]

Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.

v2: Sorted the Macro`s by value (Andrzej)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 include/video/mipi_display.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h
index ddcc8ca..6831c84 100644
--- a/include/video/mipi_display.h
+++ b/include/video/mipi_display.h
@@ -117,6 +117,14 @@ enum {
 	MIPI_DCS_GET_SCANLINE		= 0x45,
 	MIPI_DCS_READ_DDB_START		= 0xA1,
 	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,
+	MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51, /*Spec 1.3*/
+	MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52, /*Spec 1.3*/
+	MIPI_DCS_WRITE_CONTROL_DISPLAY  = 0x53, /*Spec 1.3*/
+	MIPI_DCS_GET_CONTROL_DISPLAY	= 0x54, /*Spec 1.3*/
+	MIPI_DCS_WRITE_POWER_SAVE	= 0x55, /*Spec 1.3*/
+	MIPI_DCS_GET_POWER_SAVE		= 0x56, /*Spec 1.3*/
+	MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E, /*Spec 1.3*/
+	MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F, /*Spec 1.3*/
 };
 
 /* MIPI DCS pixel formats */
-- 
1.9.1

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[PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

[Deepak M]

For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.

v2: Moving the comment to intel_dsi.h(Jani)

v3: Renaming the field names (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
 drivers/gpu/drm/i915/intel_bios.h |  5 ++++-
 drivers/gpu/drm/i915/intel_dsi.h  |  9 +++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 083003b..1af7074 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -749,6 +749,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
 		return;
 	}
 
+	/*
+	 * These fileds are introduced from the VBT version 197 onwards,
+	 * so making sure that these bits are set zero in the pervious
+	 * versions.
+	 */
+	if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
+		dev_priv->vbt.dsi.config->dl_cabc_ports = 0;
+		dev_priv->vbt.dsi.config->dl_panel_pwm_ports = 0;
+	}
+
 	/* We have mandatory mipi config blocks. Initialize as generic panel */
 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 }
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index ab0ea31..fdfb634 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -113,7 +113,10 @@ struct mipi_config {
 	u16 dual_link:2;
 	u16 lane_cnt:2;
 	u16 pixel_overlap:3;
-	u16 rsvd3:9;
+	u16 rgb_flip:1;
+	u16 dl_cabc_ports:2;
+	u16 dl_panel_pwm_ports:2;
+	u16 rsvd3:4;
 
 	u16 rsvd4;
 
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index e582ef8..f54748d 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -78,6 +78,15 @@ struct intel_dsi {
 
 	u8 escape_clk_div;
 	u8 dual_link;
+
+	/*
+	 * Below field will inform us on which port the panel blk_cntrl
+	 * and CABC ON/OFF commands needs to be sent in case of dual link
+	 * panels
+	 */
+	u8 cabc_dcs_ports;
+	u8 panel_pwm_dcs_ports;
+
 	u8 pixel_overlap;
 	u32 port_bits;
 	u32 bw_timer;
-- 
1.9.1

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[PATCH 3/5] drm/i915: Parse LFP brightness control field in VBT

[Deepak M]

These fields in VBT indicates the PWM source which
is used and also the controller number.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h       |  2 ++
 drivers/gpu/drm/i915/intel_bios.c     | 12 ++++++++++++
 drivers/gpu/drm/i915/intel_drv.h      |  5 +++++
 drivers/gpu/drm/i915/intel_vbt_defs.h |  6 ++++++
 4 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 050d860..30321e6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1488,6 +1488,8 @@ struct intel_vbt_data {
 		bool present;
 		bool active_low_pwm;
 		u8 min_brightness;	/* min_brightness/255 of max */
+		u8 pwm_pin;		/* Source of PWM */
+		u8 pwm_controller;	/* Controller used in particular PWM */
 	} backlight;
 
 	/* MIPI DSI */
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 1af7074..1a5b124 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -284,6 +284,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
 {
 	const struct bdb_lfp_backlight_data *backlight_data;
 	const struct bdb_lfp_backlight_data_entry *entry;
+	const struct bdb_lfp_backlight_control_data *bl_ctrl_data;
 
 	backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
 	if (!backlight_data)
@@ -296,6 +297,7 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
 	}
 
 	entry = &backlight_data->data[panel_type];
+	bl_ctrl_data = &backlight_data->blc_ctl[panel_type];
 
 	dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
 	if (!dev_priv->vbt.backlight.present) {
@@ -304,6 +306,16 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv,
 		return;
 	}
 
+	/*
+	 * IF the VBT version is less than 191, set the
+	 * pwm controller as PMIC by default.
+	 */
+	dev_priv->vbt.backlight.pwm_pin = BLC_CONTROL_PIN_PMIC;
+	if (bdb->version >= 191) {
+		dev_priv->vbt.backlight.pwm_pin = bl_ctrl_data->pin;
+		dev_priv->vbt.backlight.pwm_controller = bl_ctrl_data->controller;
+	}
+
 	dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
 	dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
 	dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index c87b450..02a74b0 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -124,6 +124,11 @@
 #define INTEL_I2C_BUS_DVO 1
 #define INTEL_I2C_BUS_SDVO 2
 
+#define BLC_CONTROL_PIN_PMIC		0
+#define BLC_CONTROL_PIN_LPSS_PWM	1
+#define BLC_CONTROL_PIN_DDI		2
+#define BLC_CONTROL_PIN_PANEL_PWM	3
+
 /* these are outputs from the chip - integrated only
    external chips are via DVO or SDVO output */
 enum intel_output_type {
diff --git a/drivers/gpu/drm/i915/intel_vbt_defs.h b/drivers/gpu/drm/i915/intel_vbt_defs.h
index 749dcea..f6744dc 100644
--- a/drivers/gpu/drm/i915/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/intel_vbt_defs.h
@@ -440,10 +440,16 @@ struct bdb_lfp_backlight_data_entry {
 	u8 obsolete3;
 } __packed;
 
+struct bdb_lfp_backlight_control_data {
+	u8 pin:4;
+	u8 controller:4;
+} __packed;
+
 struct bdb_lfp_backlight_data {
 	u8 entry_size;
 	struct bdb_lfp_backlight_data_entry data[16];
 	u8 level[16];
+	struct bdb_lfp_backlight_control_data blc_ctl[16];
 } __packed;
 
 struct aimdb_header {
-- 
1.9.1

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[PATCH 4/5] drm/i915: Add DCS control for Panel PWM

[Deepak M]

If the source of the backlight PWM is from the
panel then the PWM can be controlled by DCS
command, this patch adds the support to
enable/disbale panel PWM, control backlight level
etc...

v2: Moving the CABC bkl functions to new file.(Jani)

v3: Rebase

v4: Rebase

v5: Use mipi_dsi_dcs_write() instead of mipi_dsi_dcs_write_buffer() (Jani)
    Move DCS macro`s to include/video/mipi_display.h (Jani)

v6: Rename the file to intel_dsi_dcs_backlight.c
    Removing the CABC operations

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/Makefile                  |   1 +
 drivers/gpu/drm/i915/i915_drv.h                |   1 -
 drivers/gpu/drm/i915/intel_drv.h               |   2 +
 drivers/gpu/drm/i915/intel_dsi.c               |  24 +++-
 drivers/gpu/drm/i915/intel_dsi.h               |   4 +
 drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c | 160 +++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_panel.c             |   4 +
 7 files changed, 193 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 7ffb51b..3f6a3cf 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -83,6 +83,7 @@ i915-y += dvo_ch7017.o \
 	  intel_dp_mst.o \
 	  intel_dp.o \
 	  intel_dsi.o \
+	  intel_dsi_dcs_backlight.o \
 	  intel_dsi_panel_vbt.o \
 	  intel_dsi_pll.o \
 	  intel_dvo.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 30321e6..7d6118d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3491,7 +3491,6 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
 		     enum intel_sbi_destination destination);
 u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
 void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-
 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
 
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 02a74b0..0603c9f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1330,6 +1330,8 @@ void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
 /* intel_dsi.c */
 void intel_dsi_init(struct drm_device *dev);
 
+/* intel_dsi_panel_pwm.c */
+int intel_dsi_panel_pwm_init_backlight_funcs(struct intel_connector *intel_connector);
 
 /* intel_dvo.c */
 void intel_dvo_init(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 456676c..1ba757a 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1209,10 +1209,30 @@ void intel_dsi_init(struct drm_device *dev)
 	else
 		intel_encoder->crtc_mask = BIT(PIPE_B);
 
-	if (dev_priv->vbt.dsi.config->dual_link)
+	if (dev_priv->vbt.dsi.config->dual_link) {
 		intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);
-	else
+
+		/*
+		 * Based on the VBT value assign the ports on
+		 * which Panel PWM On/OFF DCS coomands needs to be sent
+		 */
+		switch (dev_priv->vbt.dsi.config->dl_panel_pwm_ports) {
+		case PANEL_PWM_PORT_A:
+			intel_dsi->panel_pwm_dcs_ports = BIT(PORT_A);
+			break;
+		case PANEL_PWM_PORT_C:
+			intel_dsi->panel_pwm_dcs_ports = BIT(PORT_C);
+			break;
+		case PANEL_PWM_PORT_A_AND_C:
+			intel_dsi->panel_pwm_dcs_ports = BIT(PORT_A) | BIT(PORT_C);
+			break;
+		default:
+			intel_dsi->panel_pwm_dcs_ports = BIT(PORT_A) | BIT(PORT_C);
+		}
+	} else {
 		intel_dsi->ports = BIT(port);
+		intel_dsi->panel_pwm_dcs_ports = BIT(port);
+	}
 
 	/* Create a DSI host (and a device) for each port. */
 	for_each_dsi_port(port, intel_dsi->ports) {
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index f54748d..dcd2265 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -34,6 +34,10 @@
 #define DSI_DUAL_LINK_FRONT_BACK	1
 #define DSI_DUAL_LINK_PIXEL_ALT		2
 
+#define PANEL_PWM_PORT_A		0x00
+#define PANEL_PWM_PORT_C		0x01
+#define PANEL_PWM_PORT_A_AND_C		0x02
+
 struct intel_dsi_host;
 
 struct intel_dsi {
diff --git a/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
new file mode 100644
index 0000000..4d7f0eb
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Deepak M <m.deepak at intel.com>
+ */
+
+#include "intel_drv.h"
+#include "intel_dsi.h"
+#include "i915_drv.h"
+#include <video/mipi_display.h>
+#include <drm/drm_mipi_dsi.h>
+
+#define PANEL_PWM_BKL_EN		(1 << 2)
+#define PANEL_PWM_DISP_DIMMING		(1 << 3)
+#define PANEL_PWM_BCTRL			(1 << 5)
+
+#define PANEL_PWM_MAX_VALUE		0xFF
+
+static u32 panel_pwm_get_backlight(struct intel_connector *connector)
+{
+	struct intel_encoder *encoder = connector->encoder;
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct mipi_dsi_device *dsi_device;
+	u8 data;
+	enum port port;
+
+	/* FIXME Need to take care of 16 bit brightness level */
+	/*
+	 * Sending the DCS commands to the ports to which Panel PWM
+	 * On/Off commands were send
+	 */
+	for_each_dsi_port(port, intel_dsi->panel_pwm_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		mipi_dsi_dcs_read(dsi_device, MIPI_DCS_GET_DISPLAY_BRIGHTNESS,
+					&data, sizeof(data));
+		break;
+	}
+
+	return data;
+}
+
+static void panel_pwm_set_backlight(struct intel_connector *connector, u32 level)
+{
+	struct intel_encoder *encoder = connector->encoder;
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct mipi_dsi_device *dsi_device;
+	u8 data;
+	enum port port;
+
+	/* FIXME Need to take care of 16 bit brightness level */
+	/*
+	 * Sending the DCS commands to the ports to which Panel PWM
+	 * On/Off commands were send
+	 */
+	for_each_dsi_port(port, intel_dsi->panel_pwm_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data = level;
+		mipi_dsi_dcs_write(dsi_device, MIPI_DCS_SET_DISPLAY_BRIGHTNESS,
+					&data, sizeof(data));
+	}
+}
+
+static void panel_pwm_disable_backlight(struct intel_connector *connector)
+{
+	struct intel_encoder *encoder = connector->encoder;
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct mipi_dsi_device *dsi_device;
+	enum port port;
+	u8 data;
+
+	panel_pwm_set_backlight(connector, 0);
+
+	for_each_dsi_port(port, intel_dsi->panel_pwm_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data &= ~PANEL_PWM_BKL_EN; /* Turn Off Backlight */
+		data &= ~PANEL_PWM_DISP_DIMMING; /* Display Dimming Off */
+		data &= ~PANEL_PWM_BCTRL; /* Brightness control Block Off */
+		mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+					&data, sizeof(data));
+	}
+}
+
+static void panel_pwm_enable_backlight(struct intel_connector *connector)
+{
+	struct intel_encoder *encoder = connector->encoder;
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct intel_panel *panel = &connector->panel;
+	struct mipi_dsi_device *dsi_device;
+	enum port port;
+	u8 data;
+
+	for_each_dsi_port(port, intel_dsi->panel_pwm_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data = PANEL_PWM_BKL_EN /* Turn on backlight */
+			| PANEL_PWM_DISP_DIMMING /* Display Dimming On */
+			| PANEL_PWM_BCTRL; /* Brightness control Block On */
+		mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+					&data, sizeof(data));
+	}
+
+	panel_pwm_set_backlight(connector, panel->backlight.level);
+}
+
+static int panel_pwm_setup_backlight(struct intel_connector *connector,
+		enum pipe unused)
+{
+	struct intel_panel *panel = &connector->panel;
+
+	panel->backlight.max = PANEL_PWM_MAX_VALUE;
+	/* Assigning the MAX value during the setup */
+	panel->backlight.level = PANEL_PWM_MAX_VALUE;
+
+	return 0;
+}
+
+int intel_dsi_panel_pwm_init_backlight_funcs(struct intel_connector *intel_connector)
+{
+	struct drm_device *dev = intel_connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_encoder *encoder = intel_connector->encoder;
+	struct intel_panel *panel = &intel_connector->panel;
+
+	/*
+	 * Continue initalizing only if the PWM source is
+	 * from the panel
+	 */
+	if (dev_priv->vbt.backlight.pwm_pin !=
+			BLC_CONTROL_PIN_PANEL_PWM)
+		return -ENODEV;
+
+	if (WARN_ON(encoder->type != INTEL_OUTPUT_DSI))
+		return -EINVAL;
+
+	panel->backlight.setup = panel_pwm_setup_backlight;
+	panel->backlight.enable = panel_pwm_enable_backlight;
+	panel->backlight.disable = panel_pwm_disable_backlight;
+	panel->backlight.set = panel_pwm_set_backlight;
+	panel->backlight.get = panel_pwm_get_backlight;
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 8c8996f..46ca2de 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
 		container_of(panel, struct intel_connector, panel);
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 
+	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
+		intel_dsi_panel_pwm_init_backlight_funcs(connector) == 0)
+		return;
+
 	if (IS_BROXTON(dev_priv)) {
 		panel->backlight.setup = bxt_setup_backlight;
 		panel->backlight.enable = bxt_enable_backlight;
-- 
1.9.1

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[PATCH 5/5] drm/i915: CABC support for Panel PWM backlight control

[Deepak M]

In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.

The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion here assumes that the
panels use standard SW register for control.

CABC is supported only when the PWM source for backlight is
from the panel.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c               | 19 ++++++++++++++++
 drivers/gpu/drm/i915/intel_dsi.h               |  3 +++
 drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c | 30 ++++++++++++++++++++++++++
 3 files changed, 52 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 1ba757a..a7b2949 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1229,9 +1229,28 @@ void intel_dsi_init(struct drm_device *dev)
 		default:
 			intel_dsi->panel_pwm_dcs_ports = BIT(PORT_A) | BIT(PORT_C);
 		}
+
+		/*
+		 * Based on the VBT value assign the ports on
+		 * which CABC ON/OFF comands needs to be sent
+		 */
+		switch (dev_priv->vbt.dsi.config->dl_cabc_ports) {
+		case CABC_PORT_A:
+			intel_dsi->cabc_dcs_ports = BIT(PORT_A);
+			break;
+		case CABC_PORT_C:
+			intel_dsi->cabc_dcs_ports = BIT(PORT_C);
+			break;
+		case CABC_PORT_A_AND_C:
+			intel_dsi->cabc_dcs_ports = BIT(PORT_A) | BIT(PORT_C);
+			break;
+		default:
+			intel_dsi->cabc_dcs_ports = BIT(PORT_A) | BIT(PORT_C);
+		}
 	} else {
 		intel_dsi->ports = BIT(port);
 		intel_dsi->panel_pwm_dcs_ports = BIT(port);
+                intel_dsi->cabc_dcs_ports = BIT(port);
 	}
 
 	/* Create a DSI host (and a device) for each port. */
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index dcd2265..322eebd 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -37,6 +37,9 @@
 #define PANEL_PWM_PORT_A		0x00
 #define PANEL_PWM_PORT_C		0x01
 #define PANEL_PWM_PORT_A_AND_C		0x02
+#define CABC_PORT_A			0x00
+#define CABC_PORT_C			0x01
+#define CABC_PORT_A_AND_C		0x02
 
 struct intel_dsi_host;
 
diff --git a/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
index 4d7f0eb..5417f80 100644
--- a/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
+++ b/drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c
@@ -33,6 +33,11 @@
 #define PANEL_PWM_DISP_DIMMING		(1 << 3)
 #define PANEL_PWM_BCTRL			(1 << 5)
 
+#define CABC_OFF			(0 << 0)
+#define CABC_USER_INTERFACE_IMAGE	(1 << 0)
+#define CABC_STILL_PICTURE		(2 << 0)
+#define CABC_VIDEO_MODE			(3 << 0)
+
 #define PANEL_PWM_MAX_VALUE		0xFF
 
 static u32 panel_pwm_get_backlight(struct intel_connector *connector)
@@ -81,6 +86,8 @@ static void panel_pwm_set_backlight(struct intel_connector *connector, u32 level
 
 static void panel_pwm_disable_backlight(struct intel_connector *connector)
 {
+	struct drm_device *dev = connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_encoder *encoder = connector->encoder;
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
 	struct mipi_dsi_device *dsi_device;
@@ -89,6 +96,16 @@ static void panel_pwm_disable_backlight(struct intel_connector *connector)
 
 	panel_pwm_set_backlight(connector, 0);
 
+	if (dev_priv->vbt.dsi.config->cabc_supported) {
+		data = 0;
+		for_each_dsi_port(port, intel_dsi->cabc_dcs_ports) {
+			dsi_device = intel_dsi->dsi_hosts[port]->device;
+			data = CABC_OFF;
+			mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE,
+					&data, sizeof(data));
+		}
+	}
+
 	for_each_dsi_port(port, intel_dsi->panel_pwm_dcs_ports) {
 		dsi_device = intel_dsi->dsi_hosts[port]->device;
 		data &= ~PANEL_PWM_BKL_EN; /* Turn Off Backlight */
@@ -101,6 +118,8 @@ static void panel_pwm_disable_backlight(struct intel_connector *connector)
 
 static void panel_pwm_enable_backlight(struct intel_connector *connector)
 {
+	struct drm_device *dev = connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_encoder *encoder = connector->encoder;
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
 	struct intel_panel *panel = &connector->panel;
@@ -117,6 +136,17 @@ static void panel_pwm_enable_backlight(struct intel_connector *connector)
 					&data, sizeof(data));
 	}
 
+	if (dev_priv->vbt.dsi.config->cabc_supported) {
+		data = 0;
+		for_each_dsi_port(port, intel_dsi->cabc_dcs_ports) {
+			dsi_device = intel_dsi->dsi_hosts[port]->device;
+			/* Enabling CABC in still mode */
+			data = CABC_STILL_PICTURE;
+			mipi_dsi_dcs_write(dsi_device, MIPI_DCS_WRITE_POWER_SAVE,
+					&data, sizeof(data));
+		}
+	}
+
 	panel_pwm_set_backlight(connector, panel->backlight.level);
 }
 
-- 
1.9.1

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✗ Fi.CI.BAT: failure for series starting with [1/5] drm: Add new DCS commands in the enum list

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm: Add new DCS commands in the enum list
URL   : https://patchwork.freedesktop.org/series/4993/
State : failure

== Summary ==

Series 4993v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/4993/revisions/1/mbox/

Test drv_module_reload_basic:
                dmesg-warn -> DMESG-FAIL (snb-dellxps)
                dmesg-warn -> DMESG-FAIL (hsw-brixbox)
Test gem_ctx_switch:
        Subgroup basic-default:
                pass       -> FAIL       (bdw-ultra)
Test gem_exec_nop:
        Subgroup basic:
                fail       -> PASS       (snb-x220t)
                pass       -> FAIL       (bdw-ultra)
Test gem_exec_suspend:
        Subgroup basic-s4:
                skip       -> FAIL       (bdw-ultra)
Test gem_exec_whisper:
        Subgroup basic:
                pass       -> FAIL       (bdw-ultra)
Test gem_mmap_gtt:
        Subgroup basic-read-write-distinct:
                incomplete -> PASS       (snb-x220t)
Test gem_sync:
        Subgroup basic-all:
                fail       -> PASS       (snb-x220t)
                pass       -> FAIL       (bdw-ultra)
        Subgroup basic-blt:
                pass       -> FAIL       (snb-dellxps)
                pass       -> FAIL       (bdw-ultra)
        Subgroup basic-bsd:
                pass       -> FAIL       (bdw-ultra)
                pass       -> FAIL       (ivb-t430s)
        Subgroup basic-default:
                pass       -> FAIL       (bdw-ultra)
        Subgroup basic-render:
                pass       -> FAIL       (bdw-ultra) UNSTABLE
        Subgroup basic-vebox:
                pass       -> FAIL       (bdw-ultra)
Test kms_flip:
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> FAIL       (byt-nuc)
Test kms_force_connector_basic:
        Subgroup force-edid:
                pass       -> SKIP       (ivb-t430s)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> INCOMPLETE (hsw-gt2)
        Subgroup suspend-read-crc-pipe-c:
                dmesg-fail -> SKIP       (snb-x220t)
                pass       -> DMESG-WARN (bsw-nuc-2)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                pass       -> DMESG-WARN (bsw-nuc-2)
                pass       -> DMESG-WARN (byt-nuc)
        Subgroup basic-rte:
                dmesg-warn -> PASS       (byt-nuc) UNSTABLE
Test prime_self_import:
        Subgroup basic-with_fd_dup:
                incomplete -> PASS       (snb-x220t)

bdw-nuci7        total:195  pass:181  dwarn:1   dfail:0   fail:1   skip:12 
bdw-ultra        total:195  pass:162  dwarn:1   dfail:0   fail:12  skip:20 
bsw-nuc-2        total:195  pass:154  dwarn:3   dfail:0   fail:1   skip:37 
byt-nuc          total:195  pass:156  dwarn:2   dfail:0   fail:2   skip:35 
hsw-brixbox      total:195  pass:171  dwarn:0   dfail:1   fail:1   skip:22 
hsw-gt2          total:113  pass:101  dwarn:0   dfail:0   fail:1   skip:10 
ilk-hp8440p      total:195  pass:129  dwarn:1   dfail:0   fail:1   skip:64 
ivb-t430s        total:195  pass:166  dwarn:1   dfail:0   fail:2   skip:26 
skl-i7k-2        total:195  pass:170  dwarn:1   dfail:0   fail:1   skip:23 
skl-nuci5        total:195  pass:182  dwarn:1   dfail:0   fail:1   skip:11 
snb-dellxps      total:195  pass:158  dwarn:0   dfail:1   fail:2   skip:34 
snb-x220t        total:195  pass:159  dwarn:1   dfail:0   fail:2   skip:33 

Results at /archive/results/CI_IGT_test/Patchwork_1734/

2702045fbd4188c1c26bd890bc43976fd10937ad drm-intel-nightly: 2016y-03m-29d-12h-21m-19s UTC integration manifest
a6e25ca20baff1fed320cb39c798ad77724ee708 drm/i915: CABC support for Panel PWM backlight control
227c38a6fcc16a9509188c6fff360a66e669cc27 drm/i915: Add DCS control for Panel PWM
5ba6980d6a96b1d67b4c80e82d9251901c500fc7 drm/i915: Parse LFP brightness control field in VBT
cbb92b6e8fcf6f48b7982776ece9738612467825 drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT
5f54a515183f510df917a2138ab38a4a7f8ffdc6 drm: Add new DCS commands in the enum list

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[PATCH 1/5] drm: Add new DCS commands in the enum list

[Jani Nikula]

From: Deepak M <m.deepak@intel.com>

Adding new DCS commands which are specified in the
DCS 1.3 spec related to CABC.

v2: Sorted the Macro`s by value (Andrzej)

v3 by Jani: sort all of enum, refer to MIPI DCS 1.3

Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: <dri-devel@lists.freedesktop.org>
Suggested-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 include/video/mipi_display.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h
index ddcc8ca7316b..19aa65a35546 100644
--- a/include/video/mipi_display.h
+++ b/include/video/mipi_display.h
@@ -115,6 +115,14 @@ enum {
 	MIPI_DCS_READ_MEMORY_CONTINUE	= 0x3E,
 	MIPI_DCS_SET_TEAR_SCANLINE	= 0x44,
 	MIPI_DCS_GET_SCANLINE		= 0x45,
+	MIPI_DCS_SET_DISPLAY_BRIGHTNESS = 0x51,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_DISPLAY_BRIGHTNESS = 0x52,		/* MIPI DCS 1.3 */
+	MIPI_DCS_WRITE_CONTROL_DISPLAY  = 0x53,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_CONTROL_DISPLAY	= 0x54,		/* MIPI DCS 1.3 */
+	MIPI_DCS_WRITE_POWER_SAVE	= 0x55,		/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_POWER_SAVE		= 0x56,		/* MIPI DCS 1.3 */
+	MIPI_DCS_SET_CABC_MIN_BRIGHTNESS = 0x5E,	/* MIPI DCS 1.3 */
+	MIPI_DCS_GET_CABC_MIN_BRIGHTNESS = 0x5F,	/* MIPI DCS 1.3 */
 	MIPI_DCS_READ_DDB_START		= 0xA1,
 	MIPI_DCS_READ_DDB_CONTINUE	= 0xA8,
 };
-- 
2.1.4

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[PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

[Jani Nikula]

From: Deepak M <m.deepak@intel.com>

For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.

v2: Moving the comment to intel_dsi.h(Jani)

v3: Renaming the field names (Jani)

v4 by Jani: make this patch only about VBT

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
 drivers/gpu/drm/i915/intel_bios.h |  8 +++++++-
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 9c406b0f4173..6985519921b4 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -746,6 +746,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
 		return;
 	}
 
+	/*
+	 * These fields are introduced from the VBT version 197 onwards,
+	 * so making sure that these bits are set zero in the previous
+	 * versions.
+	 */
+	if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
+		dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
+		dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
+	}
+
 	/* We have mandatory mipi config blocks. Initialize as generic panel */
 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 }
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index ab0ea315eddb..149c3226e895 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -113,7 +113,13 @@ struct mipi_config {
 	u16 dual_link:2;
 	u16 lane_cnt:2;
 	u16 pixel_overlap:3;
-	u16 rsvd3:9;
+	u16 rgb_flip:1;
+#define DL_DCS_PORT_A			0x00
+#define DL_DCS_PORT_C			0x01
+#define DL_DCS_PORT_A_AND_C		0x02
+	u16 dl_dcs_cabc_ports:2;
+	u16 dl_dcs_backlight_ports:2;
+	u16 rsvd3:4;
 
 	u16 rsvd4;
 
-- 
2.1.4

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Re: [PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

[Jani Nikula]

On Wed, 30 Mar 2016, Jani Nikula <jani.nikula@intel.com> wrote:
> From: Deepak M <m.deepak@intel.com>
>
> For dual link panel scenarios there are new fields added in the
> VBT which indicate on which port the PWM cntrl and CABC ON/OFF
> commands needs to be sent.
>
> v2: Moving the comment to intel_dsi.h(Jani)
>
> v3: Renaming the field names (Jani)
>
> v4 by Jani: make this patch only about VBT
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Pushed to drm-intel-next-queued.

BR,
Jani.


> ---
>  drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
>  drivers/gpu/drm/i915/intel_bios.h |  8 +++++++-
>  2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index 9c406b0f4173..6985519921b4 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -746,6 +746,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
>  		return;
>  	}
>  
> +	/*
> +	 * These fields are introduced from the VBT version 197 onwards,
> +	 * so making sure that these bits are set zero in the previous
> +	 * versions.
> +	 */
> +	if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
> +		dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
> +		dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
> +	}
> +
>  	/* We have mandatory mipi config blocks. Initialize as generic panel */
>  	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
> index ab0ea315eddb..149c3226e895 100644
> --- a/drivers/gpu/drm/i915/intel_bios.h
> +++ b/drivers/gpu/drm/i915/intel_bios.h
> @@ -113,7 +113,13 @@ struct mipi_config {
>  	u16 dual_link:2;
>  	u16 lane_cnt:2;
>  	u16 pixel_overlap:3;
> -	u16 rsvd3:9;
> +	u16 rgb_flip:1;
> +#define DL_DCS_PORT_A			0x00
> +#define DL_DCS_PORT_C			0x01
> +#define DL_DCS_PORT_A_AND_C		0x02
> +	u16 dl_dcs_cabc_ports:2;
> +	u16 dl_dcs_backlight_ports:2;
> +	u16 rsvd3:4;
>  
>  	u16 rsvd4;

-- 
Jani Nikula, Intel Open Source Technology Center
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[PATCH 0/5] drm/i915: dsi dcs & cabc backlight control

[Jani Nikula]

This is my review of [1].

BR,
Jani.

[1] https://patchwork.freedesktop.org/series/4993/

Deepak M (5):
  drm: Add new DCS commands in the enum list
  drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT
  drm/i915: Parse LFP brightness control field in VBT
  drm/i915: Add DCS control for Panel PWM
  CABC support for Panel PWM backlight control

 drivers/gpu/drm/i915/Makefile                  |   1 +
 drivers/gpu/drm/i915/i915_drv.h                |   1 +
 drivers/gpu/drm/i915/intel_bios.c              |  19 +++
 drivers/gpu/drm/i915/intel_bios.h              |  16 ++-
 drivers/gpu/drm/i915/intel_drv.h               |   2 +
 drivers/gpu/drm/i915/intel_dsi.c               |  36 ++++-
 drivers/gpu/drm/i915/intel_dsi.h               |   4 +
 drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c | 179 +++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_panel.c             |   4 +
 drivers/gpu/drm/i915/intel_vbt_defs.h          |   6 +
 include/video/mipi_display.h                   |   8 ++
 11 files changed, 273 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_dsi_dcs_backlight.c

-- 
2.1.4

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[PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

[Jani Nikula]

From: Deepak M <m.deepak@intel.com>

For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.

v2: Moving the comment to intel_dsi.h(Jani)

v3: Renaming the field names (Jani)

v4 by Jani: make this patch only about VBT

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
 drivers/gpu/drm/i915/intel_bios.h |  8 +++++++-
 2 files changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 9c406b0f4173..6985519921b4 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -746,6 +746,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
 		return;
 	}
 
+	/*
+	 * These fields are introduced from the VBT version 197 onwards,
+	 * so making sure that these bits are set zero in the previous
+	 * versions.
+	 */
+	if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
+		dev_priv->vbt.dsi.config->dl_dcs_cabc_ports = 0;
+		dev_priv->vbt.dsi.config->dl_dcs_backlight_ports = 0;
+	}
+
 	/* We have mandatory mipi config blocks. Initialize as generic panel */
 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 }
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index ab0ea315eddb..149c3226e895 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -113,7 +113,13 @@ struct mipi_config {
 	u16 dual_link:2;
 	u16 lane_cnt:2;
 	u16 pixel_overlap:3;
-	u16 rsvd3:9;
+	u16 rgb_flip:1;
+#define DL_DCS_PORT_A			0x00
+#define DL_DCS_PORT_C			0x01
+#define DL_DCS_PORT_A_AND_C		0x02
+	u16 dl_dcs_cabc_ports:2;
+	u16 dl_dcs_backlight_ports:2;
+	u16 rsvd3:4;
 
 	u16 rsvd4;
 
-- 
2.1.4

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[PATCH 2/5] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fields in VBT

[Deepak M]

For dual link panel scenarios there are new fields added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.

v2: Moving the comment to intel_dsi.h(Jani)

v3: Renaming the field names (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---

DCS commands 0x53h and 0x54h controls the panel
PWM operations and therfore we should send these
commands to the ports mentioned in the field
"dl_panel_pwm_ports" in the VBT

DCS commands 55h and 56h controls the CABC operation
and therfore we should be sending these commands to
the ports specified in the field "dl_cabc_ports"
in the VBT.

 drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
 drivers/gpu/drm/i915/intel_bios.h |  5 ++++-
 drivers/gpu/drm/i915/intel_dsi.h  |  9 +++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 083003b..1af7074 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -749,6 +749,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
 		return;
 	}
 
+	/*
+	 * These fields are introduced from the VBT version 197 onwards,
+	 * so making sure that these bits are set zero in the previous
+	 * versions.
+	 */
+	if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
+		dev_priv->vbt.dsi.config->dl_cabc_ports = 0;
+		dev_priv->vbt.dsi.config->dl_panel_pwm_ports = 0;
+	}
+
 	/* We have mandatory mipi config blocks. Initialize as generic panel */
 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 }
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index ab0ea31..fdfb634 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -113,7 +113,10 @@ struct mipi_config {
 	u16 dual_link:2;
 	u16 lane_cnt:2;
 	u16 pixel_overlap:3;
-	u16 rsvd3:9;
+	u16 rgb_flip:1;
+	u16 dl_cabc_ports:2;
+	u16 dl_panel_pwm_ports:2;
+	u16 rsvd3:4;
 
 	u16 rsvd4;
 
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index e582ef8..f54748d 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -78,6 +78,15 @@ struct intel_dsi {
 
 	u8 escape_clk_div;
 	u8 dual_link;
+
+	/*
+	 * Below field will inform us on which port the panel blk_cntrl
+	 * and CABC ON/OFF commands needs to be sent in case of dual link
+	 * panels
+	 */
+	u8 cabc_dcs_ports;
+	u8 panel_pwm_dcs_ports;
+
 	u8 pixel_overlap;
 	u32 port_bits;
 	u32 bw_timer;
-- 
1.9.1

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