From: Imre Deak <imre.deak@intel.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/10] drm/i915: Move DPINVGTT setup to vlv_display_irq_reset()
Date: Tue, 12 Apr 2016 14:59:24 +0300 [thread overview]
Message-ID: <1460462364.12168.56.camel@intel.com> (raw)
In-Reply-To: <1460382992-28728-10-git-send-email-ville.syrjala@linux.intel.com>
On ma, 2016-04-11 at 16:56 +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> DPINVGTT lives inside the disp2d power well so we can't frob it unless
> we know the power well is active. Let's this stuff into
> vlv_display_irq_reset() which is only called at the right times so that
> we don't get unclaimed register access errors.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94164
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 15 +++++----------
> 1 file changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c
> b/drivers/gpu/drm/i915/i915_irq.c
> index 872f93dc68ff..d60c0e53f929 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -3289,6 +3289,11 @@ static void vlv_display_irq_reset(struct
> drm_i915_private *dev_priv)
> {
> enum pipe pipe;
>
> + if (IS_CHERRYVIEW(dev_priv))
> + I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK_CHV);
> + else
> + I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK);
> +
> i915_hotplug_interrupt_update_locked(dev_priv, 0xffffffff,
> 0);
> I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
>
> @@ -3349,8 +3354,6 @@ static void valleyview_irq_preinstall(struct
> drm_device *dev)
>
> gen5_gt_irq_reset(dev);
>
> - I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK);
> -
> spin_lock_irq(&dev_priv->irq_lock);
> if (dev_priv->display_irqs_enabled)
> vlv_display_irq_reset(dev_priv);
> @@ -3427,8 +3430,6 @@ static void cherryview_irq_preinstall(struct
> drm_device *dev)
>
> GEN5_IRQ_RESET(GEN8_PCU_);
>
> - I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK_CHV);
> -
> spin_lock_irq(&dev_priv->irq_lock);
> if (dev_priv->display_irqs_enabled)
> vlv_display_irq_reset(dev_priv);
> @@ -3714,12 +3715,6 @@ static int valleyview_irq_postinstall(struct
> drm_device *dev)
>
> gen5_gt_irq_postinstall(dev);
>
> - /* ack & enable invalid PTE error interrupts */
> -#if 0 /* FIXME: add support to irq handler for checking these bits
> */
> - I915_WRITE(DPINVGTT, DPINVGTT_STATUS_MASK);
> - I915_WRITE(DPINVGTT, DPINVGTT_EN_MASK);
> -#endif
> -
> spin_lock_irq(&dev_priv->irq_lock);
> if (dev_priv->display_irqs_enabled)
> vlv_display_irq_postinstall(dev_priv);
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next prev parent reply other threads:[~2016-04-12 11:59 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-11 13:56 [PATCH 00/10] drm/i915: Fix VLV/CHV unclaimed register errors ville.syrjala
2016-04-11 13:56 ` [PATCH 01/10] drm/i915: Remove "VLV magic" from irq setup ville.syrjala
2016-04-11 15:20 ` Imre Deak
2016-04-11 15:45 ` Ville Syrjälä
2016-04-11 13:56 ` [PATCH 02/10] drm/i915: Fix up vlv/chv display " ville.syrjala
2016-04-11 16:29 ` Imre Deak
2016-04-12 9:05 ` Ville Syrjälä
2016-04-12 10:12 ` Imre Deak
2016-04-12 15:56 ` [PATCH v2 " ville.syrjala
2016-04-11 13:56 ` [PATCH 03/10] drm/i915: Skip display irq setup if display irqs aren't flagged as enabled ville.syrjala
2016-04-11 16:31 ` Imre Deak
2016-04-11 13:56 ` [PATCH 04/10] drm/i915: Move vlv/chv display irq code to a more logical place ville.syrjala
2016-04-11 16:34 ` Imre Deak
2016-04-12 15:56 ` [PATCH v2 " ville.syrjala
2016-04-11 13:56 ` [PATCH 05/10] drm/i915: Clear display interrupt before enabling when turning on the power well ville.syrjala
2016-04-11 16:36 ` Imre Deak
2016-04-11 13:56 ` [PATCH 06/10] drm/i915: Use GEN5_IRQ_INIT() in vlv_display_irq_postinstall() ville.syrjala
2016-04-11 16:38 ` Imre Deak
2016-04-11 13:56 ` [PATCH 07/10] drm/i915: Warn if irq_mask isn't ~0 during vlv/cvh display irq postinstall ville.syrjala
2016-04-11 16:39 ` Imre Deak
2016-04-11 13:56 ` [PATCH 08/10] drm/i915: Move vlv_init_display_clock_gating() to the display power well ville.syrjala
2016-04-12 10:25 ` Imre Deak
2016-04-12 11:51 ` Ville Syrjälä
2016-04-11 13:56 ` [PATCH 09/10] drm/i915: Move DPINVGTT setup to vlv_display_irq_reset() ville.syrjala
2016-04-12 11:59 ` Imre Deak [this message]
2016-04-11 13:56 ` [PATCH 10/10] Revert "drm/i915: Limit the auto arming of mmio debugs on vlv/chv" ville.syrjala
2016-04-12 12:04 ` Imre Deak
2016-04-12 17:08 ` Ville Syrjälä
2016-04-12 19:56 ` Chris Wilson
2016-04-11 14:30 ` ✗ Fi.CI.BAT: failure for drm/i915: Fix VLV/CHV unclaimed register errors Patchwork
2016-04-12 16:13 ` Ville Syrjälä
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