[PATCH] drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR

[PATCH] drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR

[Imre Deak]

The workaround added in c6782b76d31a ("drm/i915/gen9: Reset secondary power
well requests left on by DMC/KVMR") needs to be applied on Kabylake too as
shown by the corresponding timeout errors about power well 1 and MISC IO
power well disabling in the latest CI run.

CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 259f66f..1242fb5 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -709,7 +709,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
 			DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
 		}
 
-		if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
+		if (IS_GEN9(dev_priv))
 			gen9_sanitize_power_well_requests(dev_priv, power_well);
 	}
 
-- 
2.5.0

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Re: [PATCH] drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR

[Patrik Jakobsson]

On Fri, Apr 15, 2016 at 10:32:58PM +0300, Imre Deak wrote:
> The workaround added in c6782b76d31a ("drm/i915/gen9: Reset secondary power
> well requests left on by DMC/KVMR") needs to be applied on Kabylake too as
> shown by the corresponding timeout errors about power well 1 and MISC IO
> power well disabling in the latest CI run.
> 
> CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Ok, so this seems to affect all DMC firmwares we have so far? Any news on the
bug report?

Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 259f66f..1242fb5 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -709,7 +709,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
>  			DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
>  		}
>  
> -		if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
> +		if (IS_GEN9(dev_priv))
>  			gen9_sanitize_power_well_requests(dev_priv, power_well);
>  	}
>  
> -- 
> 2.5.0
> 

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Re: [PATCH] drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR

[Imre Deak]

On ma, 2016-04-18 at 10:15 +0200, Patrik Jakobsson wrote:
> On Fri, Apr 15, 2016 at 10:32:58PM +0300, Imre Deak wrote:
> > The workaround added in c6782b76d31a ("drm/i915/gen9: Reset
> > secondary power
> > well requests left on by DMC/KVMR") needs to be applied on Kabylake
> > too as
> > shown by the corresponding timeout errors about power well 1 and
> > MISC IO
> > power well disabling in the latest CI run.
> > 
> > CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> 
> Ok, so this seems to affect all DMC firmwares we have so far? Any news
> on the bug report?

The problem was confirmed, but it's not clear whether this will be
fixed in the firmware for SKL/BXT (since we can work around it in the
driver). We can hope for a fix on later platforms.

> Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
> >  1 file changed, 1
> > insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 259f66f..1242fb5 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -709,7 +709,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
> >  			DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
> >  		}
> >  
> > -		if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
> > +		if (IS_GEN9(dev_priv))
> >  			gen9_sanitize_power_well_requests(dev_priv, power_well);
> >  	}
> >  
> > -- 
> > 2.5.0
> > 
> 
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Re: [PATCH] drm/i915/kbl: Reset secondary power well requests left on by DMC/KVMR

[Imre Deak]

On ma, 2016-04-18 at 10:15 +0200, Patrik Jakobsson wrote:
> On Fri, Apr 15, 2016 at 10:32:58PM +0300, Imre Deak wrote:
> > The workaround added in c6782b76d31a ("drm/i915/gen9: Reset
> > secondary power
> > well requests left on by DMC/KVMR") needs to be applied on Kabylake
> > too as
> > shown by the corresponding timeout errors about power well 1 and
> > MISC IO
> > power well disabling in the latest CI run.
> > 
> > CC: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> 
> Ok, so this seems to affect all DMC firmwares we have so far? Any
> news on the
> bug report?
> 
> Reviewed-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>

I pushed this to -dinq thanks for the review.

Jani, Daniel: I made a mistake pushing this before getting the CI
result. It wasn't either picked up by PW, so not sure about its status.
What can we do, revert/resubmit or wait for the next regular CI result?

Sorry for the mess,
Imre

> > ---
> >  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > index 259f66f..1242fb5 100644
> > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > @@ -709,7 +709,7 @@ static void skl_set_power_well(struct
> > drm_i915_private *dev_priv,
> >  			DRM_DEBUG_KMS("Disabling %s\n",
> > power_well->name);
> >  		}
> >  
> > -		if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv))
> > +		if (IS_GEN9(dev_priv))
> >  			gen9_sanitize_power_well_requests(dev_priv
> > , power_well);
> >  	}
> >  
> > -- 
> > 2.5.0
> > 
> 
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