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From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/10] drm/i915: Trim the flush for the execlists request emission
Date: Fri, 29 Apr 2016 10:49:57 +0300	[thread overview]
Message-ID: <1461916197.5292.5.camel@linux.intel.com> (raw)
In-Reply-To: <1461860672-12623-8-git-send-email-chris@chris-wilson.co.uk>

On to, 2016-04-28 at 17:24 +0100, Chris Wilson wrote:
> At the start of request emission, we flush some space for the request,
> estimating the typical size for the request body. The common tail is now
> much larger than the typical body, so we can shrink the flush
> substantially.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

I assume this was an educated guess to some extent not to cause huge
regressions in performance.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 4c832f90fe49..4735460be1a0 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -228,6 +228,9 @@ enum {
>  #define GEN8_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT	0x17
>  #define GEN9_CTX_RCS_INDIRECT_CTX_OFFSET_DEFAULT	0x26
>  
> +/* Typical size of the average request (2 pipecontrols and a MI_BB) */
> +#define EXECLISTS_REQUEST_SIZE 64 /* bytes */
> +
>  static int execlists_context_deferred_alloc(struct intel_context *ctx,
>  					    struct intel_engine_cs *engine);
>  static int intel_lr_context_pin(struct intel_context *ctx,
> @@ -679,7 +682,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
>  	 * we start building the request - in which case we will just
>  	 * have to repeat work.
>  	 */
> -	request->reserved_space += MIN_SPACE_FOR_ADD_REQUEST;
> +	request->reserved_space += EXECLISTS_REQUEST_SIZE;
>  
>  	if (request->ctx->engine[engine->id].state == NULL) {
>  		ret = execlists_context_deferred_alloc(request->ctx, engine);
> @@ -725,7 +728,7 @@ int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request
>  	 * to cancel/unwind this request now.
>  	 */
>  
> -	request->reserved_space -= MIN_SPACE_FOR_ADD_REQUEST;
> +	request->reserved_space -= EXECLISTS_REQUEST_SIZE;
>  	return 0;
>  
>  err_unpin:
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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  reply	other threads:[~2016-04-29  7:48 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-28 16:24 [PATCH 01/10] drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy Chris Wilson
2016-04-28 16:24 ` [PATCH 02/10] drm/i915: Fix ordering of sanitize ppgtt and sanitize execlists Chris Wilson
2016-04-28 18:48   ` Dave Gordon
2016-04-29 10:59   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 03/10] drm/i915: Fix gen8 semaphores id for legacy mode Chris Wilson
2016-04-29  8:36   ` Tvrtko Ursulin
2016-04-29  8:49     ` Chris Wilson
2016-05-04 11:35       ` Dave Gordon
2016-05-04 11:44         ` Chris Wilson
2016-04-28 16:24 ` [PATCH 04/10] drm/i915: Fix serialisation of pipecontrol write vs semaphore signal Chris Wilson
2016-04-28 16:24 ` [PATCH 05/10] drm/i915: Reload PD tables after semaphore wait on gen8 Chris Wilson
2016-04-28 16:24 ` [PATCH 06/10] drm/i915: Bump reserved size for legacy gen8 semaphore emission Chris Wilson
2016-04-29  7:40   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 07/10] drm/i915: Trim the flush for the legacy request emission Chris Wilson
2016-04-29  7:43   ` Joonas Lahtinen
2016-04-28 16:24 ` [PATCH 08/10] drm/i915: Trim the flush for the execlists " Chris Wilson
2016-04-29  7:49   ` Joonas Lahtinen [this message]
2016-04-28 16:24 ` [PATCH 09/10] drm/i915: Enable semaphores for legacy submission on gen8 Chris Wilson
2016-05-02  8:56   ` Daniel Vetter
2016-04-28 16:24 ` [PATCH 10/10] drm/i915: Enable legacy/semaphores for CI Chris Wilson
2016-04-28 16:56 ` ✗ Fi.CI.BAT: failure for series starting with [01/10] drm/i915: Apply strongly ordered RCS breadcrumb to gen8/legacy Patchwork
2016-04-29  8:30 ` [PATCH 01/10] " Joonas Lahtinen

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