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From: Durgadoss R <durgadoss.r@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ander.conselvan.de.oliveira@intel.com
Subject: [PATCH 3/5] drm/i915: Split intel_ddi_pre_enable() into DP and HDMI versions
Date: Mon, 16 May 2016 11:56:05 +0530	[thread overview]
Message-ID: <1463379967-27751-4-git-send-email-durgadoss.r@intel.com> (raw)
In-Reply-To: <1463379967-27751-1-git-send-email-durgadoss.r@intel.com>

From: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>

Split intel_ddi_pre_enable() into encoder type specific versions that
don't depend on crtc_state. The necessary parameters are passed as
function arguments. This split will be necessary for implementing DP
upfront link training.

Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 75 +++++++++++++++++++++++-----------------
 1 file changed, 44 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 65485ef..7e6331a 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1614,48 +1614,61 @@ void intel_ddi_clk_select(struct intel_encoder *encoder,
 	}
 }
 
-static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
+static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
+				int link_rate, uint32_t lane_count,
+				struct intel_shared_dpll *pll)
 {
-	struct drm_encoder *encoder = &intel_encoder->base;
-	struct drm_i915_private *dev_priv = to_i915(encoder->dev);
-	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
-	enum port port = intel_ddi_get_encoder_port(intel_encoder);
-	int type = intel_encoder->type;
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	enum port port = intel_ddi_get_encoder_port(encoder);
 
-	if (type == INTEL_OUTPUT_HDMI) {
-		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
+	intel_prepare_ddi_buffer(encoder);
 
-		intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
-	}
+	if (encoder->type == INTEL_OUTPUT_EDP)
+		intel_edp_panel_on(intel_dp);
 
-	intel_prepare_ddi_buffer(intel_encoder);
+	intel_ddi_clk_select(encoder, pll);
 
-	if (type == INTEL_OUTPUT_EDP) {
-		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-		intel_edp_panel_on(intel_dp);
-	}
+	intel_dp_set_link_params(intel_dp, link_rate, lane_count);
+	intel_ddi_init_dp_buf_reg(encoder);
 
-	intel_ddi_clk_select(intel_encoder, crtc->config->shared_dpll);
+	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
+	intel_dp_start_link_train(intel_dp);
+	if (port != PORT_A || INTEL_INFO(dev_priv)->gen >= 9)
+		intel_dp_stop_link_train(intel_dp);
+}
 
-	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP) {
-		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
+					bool has_hdmi_sink,
+					struct drm_display_mode *adjusted_mode,
+					struct intel_shared_dpll *pll)
+{
+	struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
+	struct drm_encoder *drm_encoder = &encoder->base;
 
-		intel_dp_set_link_params(intel_dp, crtc->config->port_clock,
-					 crtc->config->lane_count);
+	intel_dp_dual_mode_set_tmds_output(intel_hdmi, true);
+	intel_prepare_ddi_buffer(encoder);
+	intel_ddi_clk_select(encoder, pll);
+	intel_hdmi->set_infoframes(drm_encoder, has_hdmi_sink, adjusted_mode);
+}
 
-		intel_ddi_init_dp_buf_reg(intel_encoder);
+static void intel_ddi_pre_enable(struct intel_encoder *intel_encoder)
+{
+	struct drm_encoder *encoder = &intel_encoder->base;
+	struct intel_crtc *crtc = to_intel_crtc(encoder->crtc);
+	int type = intel_encoder->type;
 
-		intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
-		intel_dp_start_link_train(intel_dp);
-		if (port != PORT_A || INTEL_INFO(dev_priv)->gen >= 9)
-			intel_dp_stop_link_train(intel_dp);
-	} else if (type == INTEL_OUTPUT_HDMI) {
-		struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
+	if (type == INTEL_OUTPUT_DISPLAYPORT || type == INTEL_OUTPUT_EDP)
+		intel_ddi_pre_enable_dp(intel_encoder,
+					crtc->config->port_clock,
+					crtc->config->lane_count,
+					crtc->config->shared_dpll);
 
-		intel_hdmi->set_infoframes(encoder,
-					   crtc->config->has_hdmi_sink,
-					   &crtc->config->base.adjusted_mode);
-	}
+	if (type == INTEL_OUTPUT_HDMI)
+		intel_ddi_pre_enable_hdmi(intel_encoder,
+					crtc->config->has_hdmi_sink,
+					&crtc->config->base.adjusted_mode,
+					crtc->config->shared_dpll);
 }
 
 static void intel_ddi_post_disable(struct intel_encoder *intel_encoder)
-- 
1.9.1

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  parent reply	other threads:[~2016-05-16  5:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-16  6:26 [PATCHv5 0/5] Add USB typeC based DP support for BXT platform Durgadoss R
2016-05-16  6:16 ` ✗ Ro.CI.BAT: warning for Add USB typeC based DP support for BXT platform (rev6) Patchwork
2016-05-16  6:26 ` [PATCH 1/5] drm/i915: Don't pass crtc_state to intel_dp_set_link_params() Durgadoss R
2016-05-16  6:26 ` [PATCH 2/5] drm/i915: Remove ddi_pll_sel from intel_crtc_state Durgadoss R
2016-05-16  6:26 ` Durgadoss R [this message]
2016-05-16  6:26 ` [PATCHv2 4/5] drm/i915: Split bxt_ddi_pll_select() Durgadoss R
2016-05-16  6:26 ` [PATCHv5 5/5] drm/i915/dp: Enable Upfront link training for typeC DP support on BXT Durgadoss R
2016-05-17 11:28   ` Ander Conselvan De Oliveira
  -- strict thread matches above, loose matches on Subject: below --
2016-05-20  8:58 [PATCHv6 0/5] Add USB typeC based DP support for BXT platform Durgadoss R
2016-05-20  8:59 ` [PATCH 3/5] drm/i915: Split intel_ddi_pre_enable() into DP and HDMI versions Durgadoss R
2016-07-13 10:45 [PATCHv7 0/5] Add USB typeC based DP support for BXT platform Durgadoss R
2016-07-13 10:45 ` [PATCH 3/5] drm/i915: Split intel_ddi_pre_enable() into DP and HDMI versions Durgadoss R

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