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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ Ro.CI.BAT: failure for drm/i915/bxt: Fix DDI PHY setup for low resolutions (rev4)
Date: Thu, 09 Jun 2016 12:09:08 +0300	[thread overview]
Message-ID: <1465463348.25699.14.camel@intel.com> (raw)
In-Reply-To: <1465323873-9786-1-git-send-email-imre.deak@intel.com>

Somehow threading seems to be broken, v2 of 6/6 is applied out of order
after 1/6. Also I can't see v2 of 2/6 and v2 of 4/6 at [1] which I sent
along with v2 of 6/6. AFAICS the In-reply-to fields were correct in the
v2 versions I sent.

--Imre

[1] https://patchwork.freedesktop.org/series/8414/

> == Series Details ==
> 
> Series: drm/i915/bxt: Fix DDI PHY setup for low resolutions (rev4)
> URL   : https://patchwork.freedesktop.org/series/8414/
> State : failure
>
> == Summary ==
>
> Applying: drm/i915/bxt: Wait for PHY1 GRC calibration synchronously
> Applying: drm/i915/bxt: Sanitiy check the PHY lane power down status
> fatal: sha1 information is lacking or useless(drivers/gpu/drm/i915/intel_ddi.c).
> error: could not build fake ancestor
> Patch failed at 0002 drm/i915/bxt: Sanitiy check the PHY lane power down status
> The copy of the patch that failed is found in: .git/rebase-apply/patch
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
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  parent reply	other threads:[~2016-06-09  9:09 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-07 18:24 [PATCH 0/6] drm/i915/bxt: Fix DDI PHY setup for low resolutions Imre Deak
2016-06-07 18:24 ` [PATCH 1/6] drm/i915/bxt: Wait for PHY1 GRC calibration synchronously Imre Deak
2016-06-07 18:24 ` [PATCH 2/6] drm/i915: Factor out intel_power_well_get/put Imre Deak
2016-06-08 13:53   ` Ville Syrjälä
2016-06-08 15:39   ` [PATCH v2 " Imre Deak
2016-06-07 18:24 ` [PATCH 3/6] drm/i915/bxt: Move DDI PHY enabling/disabling to the power well code Imre Deak
2016-06-07 18:24 ` [PATCH 4/6] drm/i915/bxt: Set DDI PHY lane latency optimization during modeset Imre Deak
2016-06-08  6:41   ` Ander Conselvan De Oliveira
2016-06-08  8:54     ` Imre Deak
2016-06-08 15:39   ` [PATCH v2 " Imre Deak
2016-06-07 18:24 ` [PATCH 5/6] drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function prefixes Imre Deak
2016-06-07 18:24 ` [PATCH 6/6] drm/i915/bxt: Sanitiy check the PHY lane power down status Imre Deak
2016-06-08 14:19   ` Ville Syrjälä
2016-06-08 14:41     ` Imre Deak
2016-06-08 14:50       ` Ville Syrjälä
2016-06-08 14:55         ` Imre Deak
2016-06-08 15:05           ` Ville Syrjälä
2016-06-08 15:39   ` [PATCH v2 " Imre Deak
2016-06-08  5:47 ` ✓ Ro.CI.BAT: success for drm/i915/bxt: Fix DDI PHY setup for low resolutions Patchwork
2016-06-08 16:01 ` ✗ Ro.CI.BAT: failure for drm/i915/bxt: Fix DDI PHY setup for low resolutions (rev4) Patchwork
2016-06-09  9:09 ` Imre Deak [this message]
2016-06-10 12:17 ` [PATCH 0/6] drm/i915/bxt: Fix DDI PHY setup for low resolutions Ville Syrjälä

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