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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Ander Conselvan de Oliveira"
	<ander.conselvan.de.oliveira@intel.com>
Subject: Re: ✗ Ro.CI.BAT: failure for series starting with [v2,RESEND,1/6] drm/i915/bxt: Wait for PHY1 GRC calibration synchronously
Date: Mon, 13 Jun 2016 19:21:18 +0300	[thread overview]
Message-ID: <1465834878.30774.13.camel@intel.com> (raw)
In-Reply-To: <20160613142334.24712.53701@emeril.freedesktop.org>

On ma, 2016-06-13 at 14:23 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [v2,RESEND,1/6] drm/i915/bxt: Wait for
> PHY1 GRC calibration synchronously
> URL   : https://patchwork.freedesktop.org/series/8627/
> State : failure
> 
> == Summary ==
> 
> Series 8627v1 Series without cover letter
> http://patchwork.freedesktop.org/api/1.0/series/8627/revisions/1/mbox
> 
> Test gem_exec_flush:
>         Subgroup basic-batch-kernel-default-cmd:
>                 pass       -> FAIL       (ro-byt-n2820)

Pre-existing bug, unrelated platform:
https://bugs.freedesktop.org/show_bug.cgi?id=95372

Stack trace:
  #0 [__igt_fail_assert+0x101]
  #1 [gem_execbuf+0x44]
  #2 [batch+0x4c4]
  #3 [__real_main483+0x308]
  #4 [main+0x23]
  #5 [__libc_start_main+0xf0]
  #6 [_start+0x29]
  #7 [<unknown>+0x29]
child 0 failed with exit status 99
Subtest basic-batch-kernel-default-cmd: FAIL (0.252s)

(gem_exec_flush:6032) ioctl-wrappers-CRITICAL: Test assertion failure
function gem_execbuf, file ioctl_wrappers.c:589:
(gem_exec_flush:6032) ioctl-wrappers-CRITICAL: Failed assertion:
__gem_execbuf(fd, execbuf) == 0
(gem_exec_flush:6032) ioctl-wrappers-CRITICAL: error: -22 != 0
Subtest basic-batch-kernel-default-cmd failed.


Thanks for the reviews, I pushed the patchset to -dinq.

--Imre

> fi-bdw-i7-
> 5557u  total:213  pass:201  dwarn:0   dfail:0   fail:0   skip:12 
> fi-skl-i7-
> 6700k  total:213  pass:188  dwarn:0   dfail:0   fail:0   skip:25 
> ro-bdw-i5-
> 5250u  total:213  pass:197  dwarn:2   dfail:0   fail:0   skip:14 
> ro-bdw-i7-
> 5557U  total:213  pass:198  dwarn:1   dfail:0   fail:0   skip:14 
> ro-bdw-i7-
> 5600u  total:213  pass:185  dwarn:0   dfail:0   fail:0   skip:28 
> ro-bsw-
> n3050     total:213  pass:171  dwarn:1   dfail:0   fail:2   skip:39 
> ro-byt-
> n2820     total:213  pass:173  dwarn:0   dfail:0   fail:3   skip:37 
> ro-hsw-i3-
> 4010u  total:213  pass:190  dwarn:0   dfail:0   fail:0   skip:23 
> ro-hsw-i7-
> 4770r  total:213  pass:190  dwarn:0   dfail:0   fail:0   skip:23 
> ro-ilk-i7-
> 620lm  total:213  pass:150  dwarn:0   dfail:0   fail:1   skip:62 
> ro-ilk1-i5-
> 650   total:208  pass:150  dwarn:0   dfail:0   fail:1   skip:57 
> ro-ivb-i7-
> 3770   total:213  pass:181  dwarn:0   dfail:0   fail:0   skip:32 
> ro-ivb2-i7-
> 3770  total:213  pass:185  dwarn:0   dfail:0   fail:0   skip:28 
> ro-skl3-i5-6260u
> total:213  pass:201  dwarn:1   dfail:0   fail:0   skip:11 
> ro-snb-i7-
> 2620M  total:213  pass:174  dwarn:0   dfail:0   fail:1   skip:38 
> fi-hsw-i7-4770k failed to connect after reboot
> fi-skl-i5-6260u failed to connect after reboot
> fi-snb-i7-2600 failed to connect after reboot
> 
> Results at /archive/results/CI_IGT_test/RO_Patchwork_1176/
> 
> 9dfa9b5 drm-intel-nightly: 2016y-06m-13d-13h-48m-21s UTC integration
> manifest
> 361caba drm/i915/bxt: Sanitiy check the PHY lane power down status
> ab4f3b4 drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function
> prefixes
> d130ab9 drm/i915/bxt: Set DDI PHY lane latency optimization during
> modeset
> aeba9cb drm/i915/bxt: Move DDI PHY enabling/disabling to the power
> well code
> 4d8024d drm/i915: Factor out intel_power_well_get/put
> db93190 drm/i915/bxt: Wait for PHY1 GRC calibration synchronously
> 
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      reply	other threads:[~2016-06-13 16:21 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-13 13:44 [PATCH v2 RESEND 1/6] drm/i915/bxt: Wait for PHY1 GRC calibration synchronously Imre Deak
2016-06-13 13:44 ` [PATCH v2 RESEND 2/6] drm/i915: Factor out intel_power_well_get/put Imre Deak
2016-06-13 13:44 ` [PATCH v2 RESEND 3/6] drm/i915/bxt: Move DDI PHY enabling/disabling to the power well code Imre Deak
2016-06-13 13:44 ` [PATCH v2 RESEND 4/6] drm/i915/bxt: Set DDI PHY lane latency optimization during modeset Imre Deak
2016-06-13 13:44 ` [PATCH v2 RESEND 5/6] drm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function prefixes Imre Deak
2016-06-13 13:44 ` [PATCH v2 RESEND 6/6] drm/i915/bxt: Sanitiy check the PHY lane power down status Imre Deak
2016-06-13 14:23 ` ✗ Ro.CI.BAT: failure for series starting with [v2,RESEND,1/6] drm/i915/bxt: Wait for PHY1 GRC calibration synchronously Patchwork
2016-06-13 16:21   ` Imre Deak [this message]

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