* Re: [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition
2016-06-16 15:19 [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition Michał Winiarski
@ 2016-06-16 15:42 ` Chris Wilson
2016-06-16 21:04 ` Chris Wilson
2016-06-16 15:46 ` ✓ Ro.CI.BAT: success for " Patchwork
` (4 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Chris Wilson @ 2016-06-16 15:42 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
On Thu, Jun 16, 2016 at 05:19:49PM +0200, Michał Winiarski wrote:
> If the GPU load is low enough, it's possible that we'll be stuck at idle
> frequency rather than transition into softmin frequency requested by
> userspace.
> Since we assume that idle_freq <= min_freq_softlimit and
> valleyview_set_rps is already skipping write when
> requested_freq == cur_freq we can also remove vlv_set_idle function.
>
> v2: Use intel_set_rps, drop vlv_set_idle
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 33 +++++++--------------------------
> 1 file changed, 7 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 658a756..41c5d25 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4798,6 +4798,7 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
> WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
> WARN_ON(val > dev_priv->rps.max_freq);
> WARN_ON(val < dev_priv->rps.min_freq);
> + WARN_ON(val < dev_priv->rps.idle_freq);
The hw range is min_freq, max_freq.
We assert earlier if idle_freq is out of range.
>
> if (WARN_ONCE(IS_CHERRYVIEW(dev_priv) && (val & 1),
> "Odd GPU freq value\n"))
> @@ -4815,31 +4816,11 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
> trace_intel_gpu_freq_change(intel_gpu_freq(dev_priv, val));
> }
>
> -/* vlv_set_rps_idle: Set the frequency to idle, if Gfx clocks are down
> - *
> - * * If Gfx is Idle, then
> - * 1. Forcewake Media well.
> - * 2. Request idle freq.
> - * 3. Release Forcewake of Media well.
> -*/
> -static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
> -{
> - u32 val = dev_priv->rps.idle_freq;
> -
> - if (dev_priv->rps.cur_freq <= val)
> - return;
> -
> - /* Wake up the media well, as that takes a lot less
> - * power than the Render well. */
> - intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);
> - valleyview_set_rps(dev_priv, val);
> - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_MEDIA);
> -}
> -
> void gen6_rps_busy(struct drm_i915_private *dev_priv)
> {
> mutex_lock(&dev_priv->rps.hw_lock);
> if (dev_priv->rps.enabled) {
/* Ensure we start at the user's desired minimum frequency */
> + intel_set_rps(dev_priv, dev_priv->rps.min_freq_softlimit);
Only if cur_freq < min_freq_softlimit
> if (dev_priv->pm_rps_events & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED))
> gen6_rps_reset_ei(dev_priv);
> I915_WRITE(GEN6_PMINTRMSK,
> @@ -4852,10 +4833,7 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
> {
> mutex_lock(&dev_priv->rps.hw_lock);
> if (dev_priv->rps.enabled) {
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> - vlv_set_rps_idle(dev_priv);
> - else
> - gen6_set_rps(dev_priv, dev_priv->rps.idle_freq);
> + intel_set_rps(dev_priv, dev_priv->rps.idle_freq);
> dev_priv->rps.last_adj = 0;
> I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
> }
> @@ -4905,8 +4883,11 @@ void gen6_rps_boost(struct drm_i915_private *dev_priv,
>
> void intel_set_rps(struct drm_i915_private *dev_priv, u8 val)
> {
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> + intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);
And that is bogus. The comment that was removed doesn't actually reflect
what the code was doing! Lowlevel set_rps itself is doing forcewake gets,
using whatever domain is actually required to access the registers.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition
2016-06-16 15:42 ` Chris Wilson
@ 2016-06-16 21:04 ` Chris Wilson
0 siblings, 0 replies; 13+ messages in thread
From: Chris Wilson @ 2016-06-16 21:04 UTC (permalink / raw)
To: Michał Winiarski, intel-gfx, Imre Deak
On Thu, Jun 16, 2016 at 04:42:30PM +0100, Chris Wilson wrote:
> On Thu, Jun 16, 2016 at 05:19:49PM +0200, Michał Winiarski wrote:
> > void gen6_rps_busy(struct drm_i915_private *dev_priv)
> > {
> > mutex_lock(&dev_priv->rps.hw_lock);
> > if (dev_priv->rps.enabled) {
>
> /* Ensure we start at the user's desired minimum frequency */
> > + intel_set_rps(dev_priv, dev_priv->rps.min_freq_softlimit);
>
> Only if cur_freq < min_freq_softlimit
Actually thinking something like
intel_set_rps(dev_priv,
clamp(dev_priv->rps.cur_freq,
dev_priv->rps.min_freq_softlimit,
dev_priv->rps.max_freq_softlimit));
will do the trick. A request to set cur_freq will be filtered out by
intel_set_rps.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition
2016-06-16 15:19 [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition Michał Winiarski
2016-06-16 15:42 ` Chris Wilson
@ 2016-06-16 15:46 ` Patchwork
2016-06-16 16:00 ` [PATCH v2] " Ville Syrjälä
` (3 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2016-06-16 15:46 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Set softmin frequency on idle->busy transition
URL : https://patchwork.freedesktop.org/series/8790/
State : success
== Summary ==
Series 8790v1 drm/i915: Set softmin frequency on idle->busy transition
http://patchwork.freedesktop.org/api/1.0/series/8790/revisions/1/mbox
fi-skl-i7-6700k total:213 pass:188 dwarn:0 dfail:0 fail:0 skip:25
ro-bdw-i5-5250u total:213 pass:197 dwarn:1 dfail:0 fail:0 skip:15
ro-bdw-i7-5557U total:213 pass:198 dwarn:0 dfail:0 fail:0 skip:15
ro-bdw-i7-5600u total:213 pass:185 dwarn:0 dfail:0 fail:0 skip:28
ro-bsw-n3050 total:213 pass:172 dwarn:0 dfail:0 fail:2 skip:39
ro-byt-n2820 total:213 pass:173 dwarn:0 dfail:0 fail:3 skip:37
ro-hsw-i3-4010u total:213 pass:190 dwarn:0 dfail:0 fail:0 skip:23
ro-hsw-i7-4770r total:213 pass:190 dwarn:0 dfail:0 fail:0 skip:23
ro-ilk-i7-620lm total:213 pass:150 dwarn:0 dfail:0 fail:1 skip:62
ro-ilk1-i5-650 total:208 pass:150 dwarn:0 dfail:0 fail:1 skip:57
ro-ivb-i7-3770 total:213 pass:181 dwarn:0 dfail:0 fail:0 skip:32
ro-ivb2-i7-3770 total:213 pass:185 dwarn:0 dfail:0 fail:0 skip:28
ro-skl3-i5-6260u total:213 pass:201 dwarn:1 dfail:0 fail:0 skip:11
ro-snb-i7-2620M total:213 pass:174 dwarn:0 dfail:0 fail:1 skip:38
fi-bdw-i7-5557u failed to connect after reboot
fi-hsw-i7-4770k failed to connect after reboot
fi-skl-i5-6260u failed to connect after reboot
fi-snb-i7-2600 failed to connect after reboot
Results at /archive/results/CI_IGT_test/RO_Patchwork_1197/
3eb202e drm-intel-nightly: 2016y-06m-16d-12h-38m-37s UTC integration manifest
98ae632 drm/i915: Set softmin frequency on idle->busy transition
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition
2016-06-16 15:19 [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition Michał Winiarski
2016-06-16 15:42 ` Chris Wilson
2016-06-16 15:46 ` ✓ Ro.CI.BAT: success for " Patchwork
@ 2016-06-16 16:00 ` Ville Syrjälä
2016-06-20 7:51 ` [PATCH v3] " Michał Winiarski
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Ville Syrjälä @ 2016-06-16 16:00 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
On Thu, Jun 16, 2016 at 05:19:49PM +0200, Michał Winiarski wrote:
> If the GPU load is low enough, it's possible that we'll be stuck at idle
> frequency rather than transition into softmin frequency requested by
> userspace.
> Since we assume that idle_freq <= min_freq_softlimit and
> valleyview_set_rps is already skipping write when
> requested_freq == cur_freq we can also remove vlv_set_idle function.
>
> v2: Use intel_set_rps, drop vlv_set_idle
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 33 +++++++--------------------------
> 1 file changed, 7 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 658a756..41c5d25 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4798,6 +4798,7 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
> WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock));
> WARN_ON(val > dev_priv->rps.max_freq);
> WARN_ON(val < dev_priv->rps.min_freq);
> + WARN_ON(val < dev_priv->rps.idle_freq);
>
> if (WARN_ONCE(IS_CHERRYVIEW(dev_priv) && (val & 1),
> "Odd GPU freq value\n"))
> @@ -4815,31 +4816,11 @@ static void valleyview_set_rps(struct drm_i915_private *dev_priv, u8 val)
> trace_intel_gpu_freq_change(intel_gpu_freq(dev_priv, val));
> }
>
> -/* vlv_set_rps_idle: Set the frequency to idle, if Gfx clocks are down
> - *
> - * * If Gfx is Idle, then
> - * 1. Forcewake Media well.
> - * 2. Request idle freq.
> - * 3. Release Forcewake of Media well.
> -*/
> -static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
> -{
> - u32 val = dev_priv->rps.idle_freq;
> -
> - if (dev_priv->rps.cur_freq <= val)
> - return;
> -
> - /* Wake up the media well, as that takes a lot less
> - * power than the Render well. */
> - intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);
> - valleyview_set_rps(dev_priv, val);
> - intel_uncore_forcewake_put(dev_priv, FORCEWAKE_MEDIA);
> -}
> -
> void gen6_rps_busy(struct drm_i915_private *dev_priv)
> {
> mutex_lock(&dev_priv->rps.hw_lock);
> if (dev_priv->rps.enabled) {
> + intel_set_rps(dev_priv, dev_priv->rps.min_freq_softlimit);
> if (dev_priv->pm_rps_events & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED))
> gen6_rps_reset_ei(dev_priv);
> I915_WRITE(GEN6_PMINTRMSK,
> @@ -4852,10 +4833,7 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
> {
> mutex_lock(&dev_priv->rps.hw_lock);
> if (dev_priv->rps.enabled) {
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> - vlv_set_rps_idle(dev_priv);
> - else
> - gen6_set_rps(dev_priv, dev_priv->rps.idle_freq);
> + intel_set_rps(dev_priv, dev_priv->rps.idle_freq);
> dev_priv->rps.last_adj = 0;
> I915_WRITE(GEN6_PMINTRMSK, 0xffffffff);
> }
> @@ -4905,8 +4883,11 @@ void gen6_rps_boost(struct drm_i915_private *dev_priv,
>
> void intel_set_rps(struct drm_i915_private *dev_priv, u8 val)
> {
> - if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> + if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
> + intel_uncore_forcewake_get(dev_priv, FORCEWAKE_MEDIA);
> valleyview_set_rps(dev_priv, val);
> + intel_uncore_forcewake_put(dev_priv, FORCEWAKE_MEDIA);
Why should we take the extra hit from waking the media well for every
RPS changes?
> + }
> else
> gen6_set_rps(dev_priv, val);
> }
> --
> 2.8.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* [PATCH v3] drm/i915: Set softmin frequency on idle->busy transition
2016-06-16 15:19 [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition Michał Winiarski
` (2 preceding siblings ...)
2016-06-16 16:00 ` [PATCH v2] " Ville Syrjälä
@ 2016-06-20 7:51 ` Michał Winiarski
2016-06-20 8:16 ` Chris Wilson
2016-06-20 9:58 ` [PATCH v4] " Michał Winiarski
2016-06-20 8:11 ` ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition (rev2) Patchwork
2016-06-20 10:21 ` ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition (rev3) Patchwork
5 siblings, 2 replies; 13+ messages in thread
From: Michał Winiarski @ 2016-06-20 7:51 UTC (permalink / raw)
To: intel-gfx
If the GPU load is low enough, it's possible that we'll be stuck at idle
frequency rather than transition into softmin frequency requested by
userspace.
v2: Use intel_set_rps, drop vlv_set_idle
v3: Back to vlv_set_idle, clamp to valid range
References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 658a756..a71f946 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4840,6 +4840,11 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv)
{
mutex_lock(&dev_priv->rps.hw_lock);
if (dev_priv->rps.enabled) {
+ /* Ensure we start at the user's desired frequency */
+ intel_set_rps(dev_priv,
+ clamp(dev_priv->rps.cur_freq,
+ dev_priv->rps.min_freq_softlimit,
+ dev_priv->rps.max_freq_softlimit));
if (dev_priv->pm_rps_events & (GEN6_PM_RP_DOWN_EI_EXPIRED | GEN6_PM_RP_UP_EI_EXPIRED))
gen6_rps_reset_ei(dev_priv);
I915_WRITE(GEN6_PMINTRMSK,
--
2.8.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3] drm/i915: Set softmin frequency on idle->busy transition
2016-06-20 7:51 ` [PATCH v3] " Michał Winiarski
@ 2016-06-20 8:16 ` Chris Wilson
2016-06-20 10:00 ` Winiarski, Michal
2016-06-20 9:58 ` [PATCH v4] " Michał Winiarski
1 sibling, 1 reply; 13+ messages in thread
From: Chris Wilson @ 2016-06-20 8:16 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
On Mon, Jun 20, 2016 at 09:51:16AM +0200, Michał Winiarski wrote:
> If the GPU load is low enough, it's possible that we'll be stuck at idle
> frequency rather than transition into softmin frequency requested by
> userspace.
>
> v2: Use intel_set_rps, drop vlv_set_idle
> v3: Back to vlv_set_idle, clamp to valid range
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 658a756..a71f946 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4840,6 +4840,11 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv)
> {
> mutex_lock(&dev_priv->rps.hw_lock);
> if (dev_priv->rps.enabled) {
> + /* Ensure we start at the user's desired frequency */
> + intel_set_rps(dev_priv,
> + clamp(dev_priv->rps.cur_freq,
> + dev_priv->rps.min_freq_softlimit,
> + dev_priv->rps.max_freq_softlimit));
Make this last (after gen6_enable_rps_interrupts), then r.b
Moving it last means that we have onion placement with rps_idle, and we
don't need a silly comment explaining the apparent duplication of the
PMINTRMSK update.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v3] drm/i915: Set softmin frequency on idle->busy transition
2016-06-20 8:16 ` Chris Wilson
@ 2016-06-20 10:00 ` Winiarski, Michal
0 siblings, 0 replies; 13+ messages in thread
From: Winiarski, Michal @ 2016-06-20 10:00 UTC (permalink / raw)
To: chris@chris-wilson.co.uk; +Cc: intel-gfx@lists.freedesktop.org
On Mon, 2016-06-20 at 09:16 +0100, Chris Wilson wrote:
> On Mon, Jun 20, 2016 at 09:51:16AM +0200, Michał Winiarski wrote:
> >
> > If the GPU load is low enough, it's possible that we'll be stuck at
> > idle
> > frequency rather than transition into softmin frequency requested
> > by
> > userspace.
> >
> > v2: Use intel_set_rps, drop vlv_set_idle
> > v3: Back to vlv_set_idle, clamp to valid range
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 658a756..a71f946 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4840,6 +4840,11 @@ void gen6_rps_busy(struct drm_i915_private
> > *dev_priv)
> > {
> > mutex_lock(&dev_priv->rps.hw_lock);
> > if (dev_priv->rps.enabled) {
> > + /* Ensure we start at the user's desired frequency
> > */
> > + intel_set_rps(dev_priv,
> > + clamp(dev_priv->rps.cur_freq,
> > + dev_priv-
> > >rps.min_freq_softlimit,
> > + dev_priv-
> > >rps.max_freq_softlimit));
> Make this last (after gen6_enable_rps_interrupts), then r.b
>
> Moving it last means that we have onion placement with rps_idle, and
> we
> don't need a silly comment explaining the apparent duplication of the
> PMINTRMSK update.
> -Chris
drm-intel tree is not doing gen6_enable_rps_interrupts there yet ;)
-Michał
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v4] drm/i915: Set softmin frequency on idle->busy transition
2016-06-20 7:51 ` [PATCH v3] " Michał Winiarski
2016-06-20 8:16 ` Chris Wilson
@ 2016-06-20 9:58 ` Michał Winiarski
2016-06-20 16:55 ` Chris Wilson
1 sibling, 1 reply; 13+ messages in thread
From: Michał Winiarski @ 2016-06-20 9:58 UTC (permalink / raw)
To: intel-gfx
If the GPU load is low enough, it's possible that we'll be stuck at idle
frequency rather than transition into softmin frequency requested by
userspace.
v2: Use intel_set_rps, drop vlv_set_idle
v3: Back to vlv_set_idle, clamp to valid range
v4: Place intel_set_rps at the end
References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 658a756..c94521cc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4844,6 +4844,12 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv)
gen6_rps_reset_ei(dev_priv);
I915_WRITE(GEN6_PMINTRMSK,
gen6_rps_pm_mask(dev_priv, dev_priv->rps.cur_freq));
+
+ /* Ensure we start at the user's desired frequency */
+ intel_set_rps(dev_priv,
+ clamp(dev_priv->rps.cur_freq,
+ dev_priv->rps.min_freq_softlimit,
+ dev_priv->rps.max_freq_softlimit));
}
mutex_unlock(&dev_priv->rps.hw_lock);
}
--
2.8.0
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^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v4] drm/i915: Set softmin frequency on idle->busy transition
2016-06-20 9:58 ` [PATCH v4] " Michał Winiarski
@ 2016-06-20 16:55 ` Chris Wilson
2016-06-21 10:41 ` Chris Wilson
0 siblings, 1 reply; 13+ messages in thread
From: Chris Wilson @ 2016-06-20 16:55 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
On Mon, Jun 20, 2016 at 11:58:27AM +0200, Michał Winiarski wrote:
> If the GPU load is low enough, it's possible that we'll be stuck at idle
> frequency rather than transition into softmin frequency requested by
> userspace.
>
> v2: Use intel_set_rps, drop vlv_set_idle
> v3: Back to vlv_set_idle, clamp to valid range
> v4: Place intel_set_rps at the end
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Mind resending this so we get proper CI results? And include the output
of pm_rps (since presumably we do fix a bug...)
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v4] drm/i915: Set softmin frequency on idle->busy transition
2016-06-20 16:55 ` Chris Wilson
@ 2016-06-21 10:41 ` Chris Wilson
0 siblings, 0 replies; 13+ messages in thread
From: Chris Wilson @ 2016-06-21 10:41 UTC (permalink / raw)
To: Michał Winiarski, intel-gfx, Imre Deak,
Ville Syrjälä
On Mon, Jun 20, 2016 at 05:55:16PM +0100, Chris Wilson wrote:
> On Mon, Jun 20, 2016 at 11:58:27AM +0200, Michał Winiarski wrote:
> > If the GPU load is low enough, it's possible that we'll be stuck at idle
> > frequency rather than transition into softmin frequency requested by
> > userspace.
> >
> > v2: Use intel_set_rps, drop vlv_set_idle
> > v3: Back to vlv_set_idle, clamp to valid range
> > v4: Place intel_set_rps at the end
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=89728
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
>
> Mind resending this so we get proper CI results? And include the output
> of pm_rps (since presumably we do fix a bug...)
I gambled and pushed.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
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^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition (rev2)
2016-06-16 15:19 [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition Michał Winiarski
` (3 preceding siblings ...)
2016-06-20 7:51 ` [PATCH v3] " Michał Winiarski
@ 2016-06-20 8:11 ` Patchwork
2016-06-20 10:21 ` ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition (rev3) Patchwork
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2016-06-20 8:11 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Set softmin frequency on idle->busy transition (rev2)
URL : https://patchwork.freedesktop.org/series/8790/
State : success
== Summary ==
Series 8790v2 drm/i915: Set softmin frequency on idle->busy transition
http://patchwork.freedesktop.org/api/1.0/series/8790/revisions/2/mbox
fi-skl-i7-6700k total:223 pass:18 dwarn:0 dfail:0 fail:0 skip:205
fi-snb-i7-2600 total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-bdw-i5-5250u total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-bdw-i7-5557U total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-bdw-i7-5600u total:223 pass:14 dwarn:0 dfail:0 fail:0 skip:209
ro-byt-n2820 total:223 pass:17 dwarn:0 dfail:0 fail:0 skip:206
ro-hsw-i3-4010u total:223 pass:18 dwarn:0 dfail:0 fail:0 skip:205
ro-hsw-i7-4770r total:223 pass:18 dwarn:0 dfail:0 fail:0 skip:205
ro-ilk-i7-620lm total:223 pass:7 dwarn:0 dfail:0 fail:0 skip:216
ro-ilk1-i5-650 total:218 pass:11 dwarn:0 dfail:0 fail:0 skip:207
ro-ivb-i7-3770 total:223 pass:17 dwarn:0 dfail:0 fail:0 skip:206
ro-ivb2-i7-3770 total:223 pass:21 dwarn:0 dfail:0 fail:0 skip:202
ro-skl3-i5-6260u total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-snb-i7-2620M total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
fi-hsw-i7-4770k failed to connect after reboot
fi-skl-i5-6260u failed to connect after reboot
ro-bsw-n3050 failed to connect after reboot
Results at /archive/results/CI_IGT_test/RO_Patchwork_1230/
43b4244 drm-intel-nightly: 2016y-06m-19d-22h-30m-37s UTC integration manifest
efe88d7 drm/i915: Set softmin frequency on idle->busy transition
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^ permalink raw reply [flat|nested] 13+ messages in thread* ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition (rev3)
2016-06-16 15:19 [PATCH v2] drm/i915: Set softmin frequency on idle->busy transition Michał Winiarski
` (4 preceding siblings ...)
2016-06-20 8:11 ` ✓ Ro.CI.BAT: success for drm/i915: Set softmin frequency on idle->busy transition (rev2) Patchwork
@ 2016-06-20 10:21 ` Patchwork
5 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2016-06-20 10:21 UTC (permalink / raw)
To: Michał Winiarski; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Set softmin frequency on idle->busy transition (rev3)
URL : https://patchwork.freedesktop.org/series/8790/
State : success
== Summary ==
Series 8790v3 drm/i915: Set softmin frequency on idle->busy transition
http://patchwork.freedesktop.org/api/1.0/series/8790/revisions/3/mbox
ro-bdw-i5-5250u total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-bdw-i7-5557U total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-bdw-i7-5600u total:223 pass:14 dwarn:0 dfail:0 fail:0 skip:209
ro-hsw-i3-4010u total:223 pass:18 dwarn:0 dfail:0 fail:0 skip:205
ro-hsw-i7-4770r total:223 pass:18 dwarn:0 dfail:0 fail:0 skip:205
ro-ilk-i7-620lm total:223 pass:7 dwarn:0 dfail:0 fail:0 skip:216
ro-skl3-i5-6260u total:223 pass:20 dwarn:0 dfail:0 fail:0 skip:203
ro-bsw-n3050 failed to connect after reboot
ro-byt-n2820 failed to connect after reboot
ro-ilk1-i5-650 failed to connect after reboot
ro-ivb2-i7-3770 failed to connect after reboot
ro-ivb-i7-3770 failed to connect after reboot
ro-snb-i7-2620M failed to connect after reboot
Results at /archive/results/CI_IGT_test/RO_Patchwork_1234/
edc0e9e drm-intel-nightly: 2016y-06m-20d-09h-47m-30s UTC integration manifest
84b3df6 drm/i915: Set softmin frequency on idle->busy transition
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 13+ messages in thread