From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [CI 11/20] drm/i915: Refactor scratch object allocation for gen2 w/a buffer
Date: Fri, 1 Jul 2016 17:23:20 +0100 [thread overview]
Message-ID: <1467390209-3576-11-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1467390209-3576-1-git-send-email-chris@chris-wilson.co.uk>
The gen2 w/a buffer is stuffed into the same slot as the gen5+ scratch
buffer. If we pass in the size we want to allocate for the scratch
buffer, both callers can use the same routine.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 32 ++++++++------------------------
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
3 files changed, 10 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c8411f8bb4ac..f1a01137334c 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2056,7 +2056,7 @@ static int logical_render_ring_init(struct intel_engine_cs *engine)
engine->emit_flush = gen8_emit_flush_render;
engine->emit_request = gen8_emit_request_render;
- ret = intel_init_pipe_control(engine);
+ ret = intel_init_pipe_control(engine, 4096);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index cc65c269b82a..f89b1797b465 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -658,16 +658,16 @@ void intel_fini_pipe_control(struct intel_engine_cs *engine)
engine->scratch.obj = NULL;
}
-int intel_init_pipe_control(struct intel_engine_cs *engine)
+int intel_init_pipe_control(struct intel_engine_cs *engine, int size)
{
struct drm_i915_gem_object *obj;
int ret;
WARN_ON(engine->scratch.obj);
- obj = i915_gem_object_create_stolen(engine->i915->dev, 4096);
+ obj = i915_gem_object_create_stolen(engine->i915->dev, size);
if (obj == NULL)
- obj = i915_gem_object_create(engine->i915->dev, 4096);
+ obj = i915_gem_object_create(engine->i915->dev, size);
if (IS_ERR(obj)) {
DRM_ERROR("Failed to allocate scratch page\n");
ret = PTR_ERR(obj);
@@ -3002,7 +3002,6 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_engine_cs *engine = &dev_priv->engine[RCS];
- struct drm_i915_gem_object *obj;
int ret;
engine->name = "render ring";
@@ -3045,31 +3044,16 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
engine->init_hw = init_render_ring;
engine->cleanup = render_ring_cleanup;
- /* Workaround batchbuffer to combat CS tlb bug. */
- if (HAS_BROKEN_CS_TLB(dev_priv)) {
- obj = i915_gem_object_create(dev, I830_WA_SIZE);
- if (IS_ERR(obj)) {
- DRM_ERROR("Failed to allocate batch bo\n");
- return PTR_ERR(obj);
- }
-
- ret = i915_gem_obj_ggtt_pin(obj, 0, 0);
- if (ret != 0) {
- drm_gem_object_unreference(&obj->base);
- DRM_ERROR("Failed to ping batch bo\n");
- return ret;
- }
-
- engine->scratch.obj = obj;
- engine->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj);
- }
-
ret = intel_init_ring_buffer(dev, engine);
if (ret)
return ret;
if (INTEL_GEN(dev_priv) >= 5) {
- ret = intel_init_pipe_control(engine);
+ ret = intel_init_pipe_control(engine, 4096);
+ if (ret)
+ return ret;
+ } else if (HAS_BROKEN_CS_TLB(dev_priv)) {
+ ret = intel_init_pipe_control(engine, I830_WA_SIZE);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 4a3152993415..e7495a2d6367 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -471,8 +471,8 @@ void intel_ring_init_seqno(struct intel_engine_cs *engine, u32 seqno);
int intel_ring_flush_all_caches(struct drm_i915_gem_request *req);
int intel_ring_invalidate_all_caches(struct drm_i915_gem_request *req);
+int intel_init_pipe_control(struct intel_engine_cs *engine, int size);
void intel_fini_pipe_control(struct intel_engine_cs *engine);
-int intel_init_pipe_control(struct intel_engine_cs *engine);
int intel_init_render_ring_buffer(struct drm_device *dev);
int intel_init_bsd_ring_buffer(struct drm_device *dev);
--
2.8.1
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next prev parent reply other threads:[~2016-07-01 16:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-01 16:23 [CI 01/20] drm/i915/shrinker: Flush active on objects before counting Chris Wilson
2016-07-01 16:23 ` [CI 02/20] drm/i915: Delay queuing hangcheck to wait-request Chris Wilson
2016-07-01 16:23 ` [CI 03/20] drm/i915: Remove the dedicated hangcheck workqueue Chris Wilson
2016-07-01 16:23 ` [CI 04/20] drm/i915: Make queueing the hangcheck work inline Chris Wilson
2016-07-01 16:23 ` [CI 05/20] drm/i915: Separate GPU hang waitqueue from advance Chris Wilson
2016-07-01 16:23 ` [CI 06/20] drm/i915: Slaughter the thundering i915_wait_request herd Chris Wilson
2016-07-01 16:23 ` [CI 07/20] drm/i915: Spin after waking up for an interrupt Chris Wilson
2016-07-01 16:23 ` [CI 08/20] drm/i915: Use HWS for seqno tracking everywhere Chris Wilson
2016-07-01 16:23 ` [CI 09/20] drm/i915: Stop mapping the scratch page into CPU space Chris Wilson
2016-07-01 16:23 ` [CI 10/20] drm/i915: Allocate scratch page from stolen Chris Wilson
2016-07-01 16:23 ` Chris Wilson [this message]
2016-07-01 16:23 ` [CI 12/20] drm/i915: Add a delay between interrupt and inspecting the final seqno (ilk) Chris Wilson
2016-07-01 16:23 ` [CI 13/20] drm/i915: Check the CPU cached value in HWS of seqno after waking the waiter Chris Wilson
2016-07-01 16:23 ` [CI 14/20] drm/i915: Only apply one barrier after a breadcrumb interrupt is posted Chris Wilson
2016-07-01 16:23 ` [CI 15/20] drm/i915: Stop setting wraparound seqno on initialisation Chris Wilson
2016-07-01 16:23 ` [CI 16/20] drm/i915: Convert trace-irq to the breadcrumb waiter Chris Wilson
2016-07-01 16:23 ` [CI 17/20] drm/i915: Embed signaling node into the GEM request Chris Wilson
2016-07-01 16:23 ` [CI 18/20] drm/i915: Move the get/put irq locking into the caller Chris Wilson
2016-07-01 16:23 ` [CI 19/20] drm/i915: Simplify enabling user-interrupts with L3-remapping Chris Wilson
2016-07-01 16:23 ` [CI 20/20] drm/i915: Remove debug noise on detecting fault-injection of missed interrupts Chris Wilson
2016-07-01 16:51 ` ✗ Ro.CI.BAT: failure for series starting with [CI,01/20] drm/i915/shrinker: Flush active on objects before counting Patchwork
-- strict thread matches above, loose matches on Subject: below --
2016-05-19 11:32 [CI 01/20] drm: Restore double clflush on the last partial cacheline Chris Wilson
2016-05-19 11:32 ` [CI 11/20] drm/i915: Refactor scratch object allocation for gen2 w/a buffer Chris Wilson
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