From: tim.gore@intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2] drm/i915:gen9: restrict WaC6DisallowByGfxPause
Date: Wed, 20 Jul 2016 11:00:25 +0100 [thread overview]
Message-ID: <1469008825-19442-1-git-send-email-tim.gore@intel.com> (raw)
From: Tim Gore <tim.gore@intel.com>
WaC6DisallowByGfxPause is currently applied unconditionally
but is not required in all revisions.
v2: extend application of workaround to agree with w/a
database, which differs from the HSD.
References: HSD#2133391
Signed-off-by: Tim Gore <tim.gore@intel.com>
---
drivers/gpu/drm/i915/intel_guc_loader.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 605c696..96b0259 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -349,7 +349,9 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
}
/* WaC6DisallowByGfxPause*/
- I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
+ if (IS_SKL_REVID(dev, 0, SKL_REVID_C0) ||
+ IS_BXT_REVID(dev, 0, BXT_REVID_B0))
+ I915_WRITE(GEN6_GFXPAUSE, 0x30FFF);
if (IS_BROXTON(dev))
I915_WRITE(GEN9LP_GT_PM_CONFIG, GT_DOORBELL_ENABLE);
--
1.9.1
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next reply other threads:[~2016-07-20 10:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-20 10:00 tim.gore [this message]
2016-07-20 10:38 ` ✗ Ro.CI.BAT: failure for drm/i915:gen9: restrict WaC6DisallowByGfxPause (rev2) Patchwork
2016-07-21 12:31 ` Gore, Tim
2016-07-21 13:48 ` Tvrtko Ursulin
2016-07-21 3:00 ` [PATCH v2] drm/i915:gen9: restrict WaC6DisallowByGfxPause Kamble, Sagar A
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