[PATCH] drm/i915: Convert stray struct intel_engine_cs *ring

Chris Wilson
2016-07-20T15:01:02Z

We still have a few uses of the identifier "ring" used when referring to
the struct intel_engine_cs (a remanent from when there was only one dual
purpose engine/ringbuffer). Rename all of this to use the familiar
engine so that the separation between the hardware engine and the
ringbuffer containing the commands is clear.

This patch was formed by searching for instances of '\<ring\>' and
changing those found to be referring to an engine. There are quite a few
instances in comments remaining where it is less clear what is
appropriate for the context, the registers still refer to ring (there we
need to check against bspec for any counter-recommendations, but quite a
few registers, like PDP should be engine based, whereas RING_HEAD
probably wants to remain as ring based) and the biggest compromise was
in error capture where we already have a local engine variable and so
finding a good name was trickier.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 15 +-
drivers/gpu/drm/i915/i915_gem.c | 26 +--
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 23 +--
drivers/gpu/drm/i915/i915_gpu_error.c | 255 +++++++++++++++--------------
drivers/gpu/drm/i915/i915_irq.c | 6 +-
drivers/gpu/drm/i915/intel_mocs.h | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 24 +--
9 files changed, 183 insertions(+), 174 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index b0fd6a7b0603..b5b520176c59 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -636,7 +636,7 @@ static bool validate_cmds_sorted(struct intel_engine_cs *engine,
return ret;
}

-static bool check_sorted(int ring_id,
+static bool check_sorted(int engine_id,
const struct drm_i915_reg_descriptor *reg_table,
int reg_count)
{
@@ -649,7 +649,7 @@ static bool check_sorted(int ring_id,

if (curr < previous) {
DRM_ERROR("CMD: table not sorted ring=%d entry=%d reg=0x%08X prev=0x%08X\n",
- ring_id, i, curr, previous);
+ engine_id, i, curr, previous);
ret = false;
}

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0f408ada1c65..808333a1d42d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -402,7 +402,7 @@ struct drm_i915_file_private {
unsigned boosts;
} rps;

- unsigned int bsd_ring;
+ unsigned int bsd_engine;
};

/* Used by dp and fdi links */
@@ -512,7 +512,7 @@ struct drm_i915_error_state {
struct intel_display_error_state *display;
struct drm_i915_error_object *semaphore_obj;

- struct drm_i915_error_ring {
+ struct drm_i915_error_engine {
bool valid;
/* Software tracked state */
bool waiting;
@@ -578,7 +578,7 @@ struct drm_i915_error_state {

pid_t pid;
char comm[TASK_COMM_LEN];
- } ring[I915_NUM_ENGINES];
+ } engine[I915_NUM_ENGINES];

struct drm_i915_error_buffer {
u32 size;
@@ -593,7 +593,7 @@ struct drm_i915_error_state {
u32 dirty:1;
u32 purgeable:1;
u32 userptr:1;
- s32 ring:4;
+ s32 engine:4;
u32 cache_level:3;
} **active_bo, **pinned_bo;

@@ -1331,7 +1331,7 @@ struct i915_gem_mm {
bool interruptible;

/* the indicator for dispatch video commands on two BSD rings */
- unsigned int bsd_ring_dispatch_index;
+ unsigned int bsd_engine_dispatch_index;

/** Bit 6 swizzling required for X tiling */
uint32_t bit_6_swizzle_x;
@@ -2500,8 +2500,9 @@ struct drm_i915_cmd_descriptor {
/*
* A table of commands requiring special handling by the command parser.
*
- * Each ring has an array of tables. Each table consists of an array of command
- * descriptors, which must be sorted with command opcodes in ascending order.
+ * Each engine has an array of tables. Each table consists of an array of
+ * command descriptors, which must be sorted with command opcodes in
+ * ascending order.
*/
struct drm_i915_cmd_table {
const struct drm_i915_cmd_descriptor *table;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 40047eb48826..d004664c0847 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -46,7 +46,7 @@ static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *o
static void
i915_gem_object_retire__write(struct drm_i915_gem_object *obj);
static void
-i915_gem_object_retire__read(struct drm_i915_gem_object *obj, int ring);
+i915_gem_object_retire__read(struct drm_i915_gem_object *obj, int engine);

static bool cpu_cache_is_coherent(struct drm_device *dev,
enum i915_cache_level level)
@@ -1385,10 +1385,10 @@ static void
i915_gem_object_retire_request(struct drm_i915_gem_object *obj,
struct drm_i915_gem_request *req)
{
- int ring = req->engine->id;
+ int engine = req->engine->id;

- if (obj->last_read_req[ring] == req)
- i915_gem_object_retire__read(obj, ring);
+ if (obj->last_read_req[engine] == req)
+ i915_gem_object_retire__read(obj, engine);
else if (obj->last_write_req == req)
i915_gem_object_retire__write(obj);

@@ -2381,20 +2381,20 @@ i915_gem_object_retire__write(struct drm_i915_gem_object *obj)
}

static void
-i915_gem_object_retire__read(struct drm_i915_gem_object *obj, int ring)
+i915_gem_object_retire__read(struct drm_i915_gem_object *obj, int engine)
{
struct i915_vma *vma;

- GEM_BUG_ON(obj->last_read_req[ring] == NULL);
- GEM_BUG_ON(!(obj->active & (1 << ring)));
+ GEM_BUG_ON(obj->last_read_req[engine] == NULL);
+ GEM_BUG_ON(!(obj->active & (1 << engine)));

- list_del_init(&obj->engine_list[ring]);
- i915_gem_request_assign(&obj->last_read_req[ring], NULL);
+ list_del_init(&obj->engine_list[engine]);
+ i915_gem_request_assign(&obj->last_read_req[engine], NULL);

- if (obj->last_write_req && obj->last_write_req->engine->id == ring)
+ if (obj->last_write_req && obj->last_write_req->engine->id == engine)
i915_gem_object_retire__write(obj);

- obj->active &= ~(1 << ring);
+ obj->active &= ~(1 << engine);
if (obj->active)
return;

@@ -4596,7 +4596,7 @@ int i915_gem_init(struct drm_device *dev)

ret = i915_gem_init_hw(dev);
if (ret == -EIO) {
- /* Allow ring initialisation to fail by marking the GPU as
+ /* Allow engine initialisation to fail by marking the GPU as
* wedged. But we only want to do this where the GPU is angry,
* for all other failure, such as an allocation failure, bail.
*/
@@ -4785,7 +4785,7 @@ int i915_gem_open(struct drm_device *dev, struct drm_file *file)
spin_lock_init(&file_priv->mm.lock);
INIT_LIST_HEAD(&file_priv->mm.request_list);

- file_priv->bsd_ring = -1;
+ file_priv->bsd_engine = -1;

ret = i915_gem_context_open(dev, file);
if (ret)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 6482ec24ff3b..5d4b5df41387 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1351,23 +1351,24 @@ i915_gem_ringbuffer_submission(struct i915_execbuffer_params *params,

/**
* Find one BSD ring to dispatch the corresponding BSD command.
- * The ring index is returned.
+ * The engine index is returned.
*/
static unsigned int
-gen8_dispatch_bsd_ring(struct drm_i915_private *dev_priv, struct drm_file *file)
+gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
+ struct drm_file *file)
{
struct drm_i915_file_private *file_priv = file->driver_priv;

/* Check whether the file_priv has already selected one ring. */
- if ((int)file_priv->bsd_ring < 0) {
+ if ((int)file_priv->bsd_engine < 0) {
/* If not, use the ping-pong mechanism to select one. */
mutex_lock(&dev_priv->drm.struct_mutex);
- file_priv->bsd_ring = dev_priv->mm.bsd_ring_dispatch_index;
- dev_priv->mm.bsd_ring_dispatch_index ^= 1;
+ file_priv->bsd_engine = dev_priv->mm.bsd_engine_dispatch_index;
+ dev_priv->mm.bsd_engine_dispatch_index ^= 1;
mutex_unlock(&dev_priv->drm.struct_mutex);
}

- return file_priv->bsd_ring;
+ return file_priv->bsd_engine;
}

#define I915_USER_RINGS (4)
@@ -1384,7 +1385,7 @@ static int
eb_select_ring(struct drm_i915_private *dev_priv,
struct drm_file *file,
struct drm_i915_gem_execbuffer2 *args,
- struct intel_engine_cs **ring)
+ struct intel_engine_cs **engine)
{
unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;

@@ -1404,7 +1405,7 @@ eb_select_ring(struct drm_i915_private *dev_priv,
unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;

if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
- bsd_idx = gen8_dispatch_bsd_ring(dev_priv, file);
+ bsd_idx = gen8_dispatch_bsd_engine(dev_priv, file);
} else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
bsd_idx <= I915_EXEC_BSD_RING2) {
bsd_idx >>= I915_EXEC_BSD_SHIFT;
@@ -1415,12 +1416,12 @@ eb_select_ring(struct drm_i915_private *dev_priv,
return -EINVAL;
}

- *ring = &dev_priv->engine[_VCS(bsd_idx)];
+ *engine = &dev_priv->engine[_VCS(bsd_idx)];
} else {
- *ring = &dev_priv->engine[user_ring_map[user_ring_id]];
+ *engine = &dev_priv->engine[user_ring_map[user_ring_id]];
}

- if (!intel_engine_initialized(*ring)) {
+ if (!intel_engine_initialized(*engine)) {
DRM_DEBUG("execbuf with invalid ring: %u\n", user_ring_id);
return -EINVAL;
}
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 4d39c7284605..d2ace2986b92 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -30,9 +30,9 @@
#include <generated/utsrelease.h>
#include "i915_drv.h"

-static const char *ring_str(int ring)
+static const char *engine_str(int engine)
{
- switch (ring) {
+ switch (engine) {
case RCS: return "render";
case VCS: return "bsd";
case BCS: return "blt";
@@ -207,8 +207,8 @@ static void print_error_buffers(struct drm_i915_error_state_buf *m,
err_puts(m, dirty_flag(err->dirty));
err_puts(m, purgeable_flag(err->purgeable));
err_puts(m, err->userptr ? " userptr" : "");
- err_puts(m, err->ring != -1 ? " " : "");
- err_puts(m, ring_str(err->ring));
+ err_puts(m, err->engine != -1 ? " " : "");
+ err_puts(m, engine_str(err->engine));
err_puts(m, i915_cache_level_str(m->i915, err->cache_level));

if (err->name)
@@ -240,69 +240,71 @@ static const char *hangcheck_action_to_str(enum intel_ring_hangcheck_action a)
}

static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
- struct drm_device *dev,
- struct drm_i915_error_state *error,
- int ring_idx)
+ struct drm_device *dev,
+ struct drm_i915_error_state *error,
+ int engine_idx)
{
- struct drm_i915_error_ring *ring = &error->ring[ring_idx];
+ struct drm_i915_error_engine *ering = &error->engine[engine_idx];

- if (!ring->valid)
+ if (!ering->valid)
return;

- err_printf(m, "%s command stream:\n", ring_str(ring_idx));
- err_printf(m, " START: 0x%08x\n", ring->start);
- err_printf(m, " HEAD: 0x%08x\n", ring->head);
- err_printf(m, " TAIL: 0x%08x\n", ring->tail);
- err_printf(m, " CTL: 0x%08x\n", ring->ctl);
- err_printf(m, " HWS: 0x%08x\n", ring->hws);
- err_printf(m, " ACTHD: 0x%08x %08x\n", (u32)(ring->acthd>>32), (u32)ring->acthd);
- err_printf(m, " IPEIR: 0x%08x\n", ring->ipeir);
- err_printf(m, " IPEHR: 0x%08x\n", ring->ipehr);
- err_printf(m, " INSTDONE: 0x%08x\n", ring->instdone);
+ err_printf(m, "%s command stream:\n", engine_str(engine_idx));
+ err_printf(m, " START: 0x%08x\n", ering->start);
+ err_printf(m, " HEAD: 0x%08x\n", ering->head);
+ err_printf(m, " TAIL: 0x%08x\n", ering->tail);
+ err_printf(m, " CTL: 0x%08x\n", ering->ctl);
+ err_printf(m, " HWS: 0x%08x\n", ering->hws);
+ err_printf(m, " ACTHD: 0x%08x %08x\n",
+ (u32)(ering->acthd>>32), (u32)ering->acthd);
+ err_printf(m, " IPEIR: 0x%08x\n", ering->ipeir);
+ err_printf(m, " IPEHR: 0x%08x\n", ering->ipehr);
+ err_printf(m, " INSTDONE: 0x%08x\n", ering->instdone);
if (INTEL_INFO(dev)->gen >= 4) {
- err_printf(m, " BBADDR: 0x%08x %08x\n", (u32)(ring->bbaddr>>32), (u32)ring->bbaddr);
- err_printf(m, " BB_STATE: 0x%08x\n", ring->bbstate);
- err_printf(m, " INSTPS: 0x%08x\n", ring->instps);
+ err_printf(m, " BBADDR: 0x%08x %08x\n",
+ (u32)(ering->bbaddr>>32), (u32)ering->bbaddr);
+ err_printf(m, " BB_STATE: 0x%08x\n", ering->bbstate);
+ err_printf(m, " INSTPS: 0x%08x\n", ering->instps);
}
- err_printf(m, " INSTPM: 0x%08x\n", ring->instpm);
- err_printf(m, " FADDR: 0x%08x %08x\n", upper_32_bits(ring->faddr),
- lower_32_bits(ring->faddr));
+ err_printf(m, " INSTPM: 0x%08x\n", ering->instpm);
+ err_printf(m, " FADDR: 0x%08x %08x\n", upper_32_bits(ering->faddr),
+ lower_32_bits(ering->faddr));
if (INTEL_INFO(dev)->gen >= 6) {
- err_printf(m, " RC PSMI: 0x%08x\n", ring->rc_psmi);
- err_printf(m, " FAULT_REG: 0x%08x\n", ring->fault_reg);
+ err_printf(m, " RC PSMI: 0x%08x\n", ering->rc_psmi);
+ err_printf(m, " FAULT_REG: 0x%08x\n", ering->fault_reg);
err_printf(m, " SYNC_0: 0x%08x [last synced 0x%08x]\n",
- ring->semaphore_mboxes[0],
- ring->semaphore_seqno[0]);
+ ering->semaphore_mboxes[0],
+ ering->semaphore_seqno[0]);
err_printf(m, " SYNC_1: 0x%08x [last synced 0x%08x]\n",
- ring->semaphore_mboxes[1],
- ring->semaphore_seqno[1]);
+ ering->semaphore_mboxes[1],
+ ering->semaphore_seqno[1]);
if (HAS_VEBOX(dev)) {
err_printf(m, " SYNC_2: 0x%08x [last synced 0x%08x]\n",
- ring->semaphore_mboxes[2],
- ring->semaphore_seqno[2]);
+ ering->semaphore_mboxes[2],
+ ering->semaphore_seqno[2]);
}
}
if (USES_PPGTT(dev)) {
- err_printf(m, " GFX_MODE: 0x%08x\n", ring->vm_info.gfx_mode);
+ err_printf(m, " GFX_MODE: 0x%08x\n", ering->vm_info.gfx_mode);

if (INTEL_INFO(dev)->gen >= 8) {
int i;
for (i = 0; i < 4; i++)
err_printf(m, " PDP%d: 0x%016llx\n",
- i, ring->vm_info.pdp[i]);
+ i, ering->vm_info.pdp[i]);
} else {
err_printf(m, " PP_DIR_BASE: 0x%08x\n",
- ring->vm_info.pp_dir_base);
+ ering->vm_info.pp_dir_base);
}
}
- err_printf(m, " seqno: 0x%08x\n", ring->seqno);
- err_printf(m, " last_seqno: 0x%08x\n", ring->last_seqno);
- err_printf(m, " waiting: %s\n", yesno(ring->waiting));
- err_printf(m, " ring->head: 0x%08x\n", ring->cpu_ring_head);
- err_printf(m, " ring->tail: 0x%08x\n", ring->cpu_ring_tail);
+ err_printf(m, " seqno: 0x%08x\n", ering->seqno);
+ err_printf(m, " last_seqno: 0x%08x\n", ering->last_seqno);
+ err_printf(m, " waiting: %s\n", yesno(ering->waiting));
+ err_printf(m, " ring->head: 0x%08x\n", ering->cpu_ring_head);
+ err_printf(m, " ring->tail: 0x%08x\n", ering->cpu_ring_tail);
err_printf(m, " hangcheck: %s [%d]\n",
- hangcheck_action_to_str(ring->hangcheck_action),
- ring->hangcheck_score);
+ hangcheck_action_to_str(ering->hangcheck_action),
+ ering->hangcheck_score);
}

void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
@@ -348,17 +350,17 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
error->time.tv_usec);
err_printf(m, "Kernel: " UTS_RELEASE "\n");
max_hangcheck_score = 0;
- for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
- if (error->ring[i].hangcheck_score > max_hangcheck_score)
- max_hangcheck_score = error->ring[i].hangcheck_score;
+ for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
+ if (error->engine[i].hangcheck_score > max_hangcheck_score)
+ max_hangcheck_score = error->engine[i].hangcheck_score;
}
- for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
- if (error->ring[i].hangcheck_score == max_hangcheck_score &&
- error->ring[i].pid != -1) {
+ for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
+ if (error->engine[i].hangcheck_score == max_hangcheck_score &&
+ error->engine[i].pid != -1) {
err_printf(m, "Active process (on ring %s): %s [%d]\n",
- ring_str(i),
- error->ring[i].comm,
- error->ring[i].pid);
+ engine_str(i),
+ error->engine[i].comm,
+ error->engine[i].pid);
}
}
err_printf(m, "Reset count: %u\n", error->reset_count);
@@ -414,7 +416,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
if (IS_GEN7(dev))
err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);

- for (i = 0; i < ARRAY_SIZE(error->ring); i++)
+ for (i = 0; i < ARRAY_SIZE(error->engine); i++)
i915_ring_error_state(m, dev, error, i);

for (i = 0; i < error->vm_count; i++) {
@@ -429,21 +431,23 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
error->pinned_bo_count[i]);
}

- for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
- obj = error->ring[i].batchbuffer;
+ for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
+ struct drm_i915_error_engine *ering = &error->engine[i];
+
+ obj = ering->batchbuffer;
if (obj) {
err_puts(m, dev_priv->engine[i].name);
- if (error->ring[i].pid != -1)
+ if (ering->pid != -1)
err_printf(m, " (submitted by %s [%d])",
- error->ring[i].comm,
- error->ring[i].pid);
+ ering->comm,
+ ering->pid);
err_printf(m, " --- gtt_offset = 0x%08x %08x\n",
upper_32_bits(obj->gtt_offset),
lower_32_bits(obj->gtt_offset));
print_error_obj(m, obj);
}

- obj = error->ring[i].wa_batchbuffer;
+ obj = ering->wa_batchbuffer;
if (obj) {
err_printf(m, "%s (w/a) --- gtt_offset = 0x%08x\n",
dev_priv->engine[i].name,
@@ -451,38 +455,38 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
print_error_obj(m, obj);
}

- if (error->ring[i].num_requests) {
+ if (ering->num_requests) {
err_printf(m, "%s --- %d requests\n",
dev_priv->engine[i].name,
- error->ring[i].num_requests);
- for (j = 0; j < error->ring[i].num_requests; j++) {
+ ering->num_requests);
+ for (j = 0; j < ering->num_requests; j++) {
err_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
- error->ring[i].requests[j].seqno,
- error->ring[i].requests[j].jiffies,
- error->ring[i].requests[j].tail);
+ ering->requests[j].seqno,
+ ering->requests[j].jiffies,
+ ering->requests[j].tail);
}
}

- if (error->ring[i].num_waiters) {
+ if (ering->num_waiters) {
err_printf(m, "%s --- %d waiters\n",
dev_priv->engine[i].name,
- error->ring[i].num_waiters);
- for (j = 0; j < error->ring[i].num_waiters; j++) {
+ ering->num_waiters);
+ for (j = 0; j < ering->num_waiters; j++) {
err_printf(m, " seqno 0x%08x for %s [%d]\n",
- error->ring[i].waiters[j].seqno,
- error->ring[i].waiters[j].comm,
- error->ring[i].waiters[j].pid);
+ ering->waiters[j].seqno,
+ ering->waiters[j].comm,
+ ering->waiters[j].pid);
}
}

- if ((obj = error->ring[i].ringbuffer)) {
+ if ((obj = ering->ringbuffer)) {
err_printf(m, "%s --- ringbuffer = 0x%08x\n",
dev_priv->engine[i].name,
lower_32_bits(obj->gtt_offset));
print_error_obj(m, obj);
}

- if ((obj = error->ring[i].hws_page)) {
+ if ((obj = ering->hws_page)) {
u64 hws_offset = obj->gtt_offset;
u32 *hws_page = &obj->pages[0][0];

@@ -504,7 +508,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
}
}

- obj = error->ring[i].wa_ctx;
+ obj = ering->wa_ctx;
if (obj) {
u64 wa_ctx_offset = obj->gtt_offset;
u32 *wa_ctx_page = &obj->pages[0][0];
@@ -526,7 +530,7 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
}
}

- if ((obj = error->ring[i].ctx)) {
+ if ((obj = ering->ctx)) {
err_printf(m, "%s --- HW Context = 0x%08x\n",
dev_priv->engine[i].name,
lower_32_bits(obj->gtt_offset));
@@ -611,15 +615,18 @@ static void i915_error_state_free(struct kref *error_ref)
typeof(*error), ref);
int i;

- for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
- i915_error_object_free(error->ring[i].batchbuffer);
- i915_error_object_free(error->ring[i].wa_batchbuffer);
- i915_error_object_free(error->ring[i].ringbuffer);
- i915_error_object_free(error->ring[i].hws_page);
- i915_error_object_free(error->ring[i].ctx);
- i915_error_object_free(error->ring[i].wa_ctx);
- kfree(error->ring[i].requests);
- kfree(error->ring[i].waiters);
+ for (i = 0; i < ARRAY_SIZE(error->engine); i++) {
+ struct drm_i915_error_engine *ering = &error->engine[i];
+
+ i915_error_object_free(ering->batchbuffer);
+ i915_error_object_free(ering->wa_batchbuffer);
+ i915_error_object_free(ering->ringbuffer);
+ i915_error_object_free(ering->hws_page);
+ i915_error_object_free(ering->ctx);
+ i915_error_object_free(ering->wa_ctx);
+
+ kfree(ering->requests);
+ kfree(ering->waiters);
}

i915_error_object_free(error->semaphore_obj);
@@ -762,8 +769,8 @@ static void capture_bo(struct drm_i915_error_buffer *err,
err->dirty = obj->dirty;
err->purgeable = obj->madv != I915_MADV_WILLNEED;
err->userptr = obj->userptr.mm != NULL;
- err->ring = obj->last_write_req ?
- i915_gem_request_get_engine(obj->last_write_req)->id : -1;
+ err->engine = obj->last_write_req ?
+ i915_gem_request_get_engine(obj->last_write_req)->id : -1;
err->cache_level = obj->cache_level;
}

@@ -815,7 +822,7 @@ static u32 capture_pinned_bo(struct drm_i915_error_buffer *err,
*/
static uint32_t i915_error_generate_code(struct drm_i915_private *dev_priv,
struct drm_i915_error_state *error,
- int *ring_id)
+ int *engine_id)
{
uint32_t error_code = 0;
int i;
@@ -826,11 +833,11 @@ static uint32_t i915_error_generate_code(struct drm_i915_private *dev_priv,
* strictly a client bug. Use instdone to differentiate those some.
*/
for (i = 0; i < I915_NUM_ENGINES; i++) {
- if (error->ring[i].hangcheck_action == HANGCHECK_HUNG) {
- if (ring_id)
- *ring_id = i;
+ if (error->engine[i].hangcheck_action == HANGCHECK_HUNG) {
+ if (engine_id)
+ *engine_id = i;

- return error->ring[i].ipehr ^ error->ring[i].instdone;
+ return error->engine[i].ipehr ^ error->engine[i].instdone;
}
}

@@ -858,7 +865,7 @@ static void i915_gem_record_fences(struct drm_i915_private *dev_priv,
static void gen8_record_semaphore_state(struct drm_i915_private *dev_priv,
struct drm_i915_error_state *error,
struct intel_engine_cs *engine,
- struct drm_i915_error_ring *ering)
+ struct drm_i915_error_engine *ering)
{
struct intel_engine_cs *to;
enum intel_engine_id id;
@@ -891,7 +898,7 @@ static void gen8_record_semaphore_state(struct drm_i915_private *dev_priv,

static void gen6_record_semaphore_state(struct drm_i915_private *dev_priv,
struct intel_engine_cs *engine,
- struct drm_i915_error_ring *ering)
+ struct drm_i915_error_engine *ering)
{
ering->semaphore_mboxes[0] = I915_READ(RING_SYNC_0(engine->mmio_base));
ering->semaphore_mboxes[1] = I915_READ(RING_SYNC_1(engine->mmio_base));
@@ -906,7 +913,7 @@ static void gen6_record_semaphore_state(struct drm_i915_private *dev_priv,
}

static void engine_record_waiters(struct intel_engine_cs *engine,
- struct drm_i915_error_ring *ering)
+ struct drm_i915_error_engine *ering)
{
struct intel_breadcrumbs *b = &engine->breadcrumbs;
struct drm_i915_error_waiter *waiter;
@@ -950,7 +957,7 @@ static void engine_record_waiters(struct intel_engine_cs *engine,
static void i915_record_ring_state(struct drm_i915_private *dev_priv,
struct drm_i915_error_state *error,
struct intel_engine_cs *engine,
- struct drm_i915_error_ring *ering)
+ struct drm_i915_error_engine *ering)
{
if (INTEL_GEN(dev_priv) >= 6) {
ering->rc_psmi = I915_READ(RING_PSMI_CTL(engine->mmio_base));
@@ -1048,7 +1055,7 @@ static void i915_record_ring_state(struct drm_i915_private *dev_priv,

static void i915_gem_record_active_context(struct intel_engine_cs *engine,
struct drm_i915_error_state *error,
- struct drm_i915_error_ring *ering)
+ struct drm_i915_error_engine *ering)
{
struct drm_i915_private *dev_priv = engine->i915;
struct drm_i915_gem_object *obj;
@@ -1077,16 +1084,17 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,

for (i = 0; i < I915_NUM_ENGINES; i++) {
struct intel_engine_cs *engine = &dev_priv->engine[i];
+ struct drm_i915_error_engine *ering = &error->engine[i];

- error->ring[i].pid = -1;
+ ering->pid = -1;

if (!intel_engine_initialized(engine))
continue;

- error->ring[i].valid = true;
+ ering->valid = true;

- i915_record_ring_state(dev_priv, error, engine, &error->ring[i]);
- engine_record_waiters(engine, &error->ring[i]);
+ i915_record_ring_state(dev_priv, error, engine, ering);
+ engine_record_waiters(engine, ering);

request = i915_gem_find_active_request(engine);
if (request) {
@@ -1100,13 +1108,13 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,
* as the simplest method to avoid being overwritten
* by userspace.
*/
- error->ring[i].batchbuffer =
+ ering->batchbuffer =
i915_error_object_create(dev_priv,
request->batch_obj,
vm);

if (HAS_BROKEN_CS_TLB(dev_priv))
- error->ring[i].wa_batchbuffer =
+ ering->wa_batchbuffer =
i915_error_ggtt_object_create(dev_priv,
engine->scratch.obj);

@@ -1116,8 +1124,8 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,
rcu_read_lock();
task = pid_task(request->pid, PIDTYPE_PID);
if (task) {
- strcpy(error->ring[i].comm, task->comm);
- error->ring[i].pid = task->pid;
+ strcpy(ering->comm, task->comm);
+ ering->pid = task->pid;
}
rcu_read_unlock();
}
@@ -1126,35 +1134,34 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,
request->ctx->flags & CONTEXT_NO_ERROR_CAPTURE;

rb = request->ringbuf;
- error->ring[i].cpu_ring_head = rb->head;
- error->ring[i].cpu_ring_tail = rb->tail;
- error->ring[i].ringbuffer =
+ ering->cpu_ring_head = rb->head;
+ ering->cpu_ring_tail = rb->tail;
+ ering->ringbuffer =
i915_error_ggtt_object_create(dev_priv,
rb->obj);
}

- error->ring[i].hws_page =
+ ering->hws_page =
i915_error_ggtt_object_create(dev_priv,
engine->status_page.obj);

if (engine->wa_ctx.obj) {
- error->ring[i].wa_ctx =
+ ering->wa_ctx =
i915_error_ggtt_object_create(dev_priv,
engine->wa_ctx.obj);
}

- i915_gem_record_active_context(engine, error, &error->ring[i]);
+ i915_gem_record_active_context(engine, error, ering);

count = 0;
list_for_each_entry(request, &engine->request_list, list)
count++;

- error->ring[i].num_requests = count;
- error->ring[i].requests =
- kcalloc(count, sizeof(*error->ring[i].requests),
- GFP_ATOMIC);
- if (error->ring[i].requests == NULL) {
- error->ring[i].num_requests = 0;
+ ering->num_requests = count;
+ ering->requests =
+ kcalloc(count, sizeof(*ering->requests), GFP_ATOMIC);
+ if (ering->requests == NULL) {
+ ering->num_requests = 0;
continue;
}

@@ -1162,7 +1169,7 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,
list_for_each_entry(request, &engine->request_list, list) {
struct drm_i915_error_request *erq;

- if (count >= error->ring[i].num_requests) {
+ if (count >= ering->num_requests) {
/*
* If the ring request list was changed in
* between the point where the error request
@@ -1181,7 +1188,7 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv,
break;
}

- erq = &error->ring[i].requests[count++];
+ erq = &ering->requests[count++];
erq->seqno = request->fence.seqno;
erq->jiffies = request->emitted_jiffies;
erq->tail = request->postfix;
@@ -1352,20 +1359,20 @@ static void i915_error_capture_msg(struct drm_i915_private *dev_priv,
const char *error_msg)
{
u32 ecode;
- int ring_id = -1, len;
+ int engine_id = -1, len;

- ecode = i915_error_generate_code(dev_priv, error, &ring_id);
+ ecode = i915_error_generate_code(dev_priv, error, &engine_id);

len = scnprintf(error->error_msg, sizeof(error->error_msg),
"GPU HANG: ecode %d:%d:0x%08x",
- INTEL_GEN(dev_priv), ring_id, ecode);
+ INTEL_GEN(dev_priv), engine_id, ecode);

- if (ring_id != -1 && error->ring[ring_id].pid != -1)
+ if (engine_id != -1 && error->engine[engine_id].pid != -1)
len += scnprintf(error->error_msg + len,
sizeof(error->error_msg) - len,
", in %s [%d]",
- error->ring[ring_id].comm,
- error->ring[ring_id].pid);
+ error->engine[engine_id].comm,
+ error->engine[engine_id].pid);

scnprintf(error->error_msg + len, sizeof(error->error_msg) - len,
", reason: %s, action: %s",
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7104dc1463eb..f5bf4f913a91 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3140,13 +3140,13 @@ static void i915_hangcheck_elapsed(struct work_struct *work)
}
} else {
/* We always increment the hangcheck score
- * if the ring is busy and still processing
+ * if the engine is busy and still processing
* the same request, so that no single request
* can run indefinitely (such as a chain of
* batches). The only time we do not increment
* the hangcheck score on this ring, if this
- * ring is in a legitimate wait for another
- * ring. In that case the waiting ring is a
+ * engine is in a legitimate wait for another
+ * engine. In that case the waiting engine is a
* victim and we want to be sure we catch the
* right culprit. Then every time we do kick
* the ring, add a small increment to the
diff --git a/drivers/gpu/drm/i915/intel_mocs.h b/drivers/gpu/drm/i915/intel_mocs.h
index 4640299e04ec..a8bd9f7bfece 100644
--- a/drivers/gpu/drm/i915/intel_mocs.h
+++ b/drivers/gpu/drm/i915/intel_mocs.h
@@ -54,6 +54,6 @@

int intel_rcs_context_init_mocs(struct drm_i915_gem_request *req);
void intel_mocs_init_l3cc_table(struct drm_device *dev);
-int intel_mocs_init_engine(struct intel_engine_cs *ring);
+int intel_mocs_init_engine(struct intel_engine_cs *engine);

#endif
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index b844e6984ae7..a6f7db2857c1 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1581,7 +1581,7 @@ gen6_ring_sync(struct drm_i915_gem_request *waiter_req,
}

static void
-gen5_seqno_barrier(struct intel_engine_cs *ring)
+gen5_seqno_barrier(struct intel_engine_cs *engine)
{
/* MI_STORE are internally buffered by the GPU and not flushed
* either by MI_FLUSH or SyncFlush or any other combination of
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 05bab8bda63d..2888fda6a5e0 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -197,14 +197,14 @@ struct intel_engine_cs {

u32 irq_keep_mask; /* always keep these interrupts */
u32 irq_enable_mask; /* bitmask to enable ring interrupt */
- void (*irq_enable)(struct intel_engine_cs *ring);
- void (*irq_disable)(struct intel_engine_cs *ring);
+ void (*irq_enable)(struct intel_engine_cs *engine);
+ void (*irq_disable)(struct intel_engine_cs *engine);

- int (*init_hw)(struct intel_engine_cs *ring);
+ int (*init_hw)(struct intel_engine_cs *engine);

int (*init_context)(struct drm_i915_gem_request *req);

- void (*write_tail)(struct intel_engine_cs *ring,
+ void (*write_tail)(struct intel_engine_cs *engine,
u32 value);
int __must_check (*flush)(struct drm_i915_gem_request *req,
u32 invalidate_domains,
@@ -216,14 +216,14 @@ struct intel_engine_cs {
* seen value is good enough. Note that the seqno will always be
* monotonic, even if not coherent.
*/
- void (*irq_seqno_barrier)(struct intel_engine_cs *ring);
+ void (*irq_seqno_barrier)(struct intel_engine_cs *engine);
int (*dispatch_execbuffer)(struct drm_i915_gem_request *req,
u64 offset, u32 length,
unsigned dispatch_flags);
#define I915_DISPATCH_SECURE 0x1
#define I915_DISPATCH_PINNED 0x2
#define I915_DISPATCH_RS 0x4
- void (*cleanup)(struct intel_engine_cs *ring);
+ void (*cleanup)(struct intel_engine_cs *engine);

/* GEN8 signal/wait table - never trust comments!
* signal to signal to signal to signal to signal to
@@ -269,7 +269,7 @@ struct intel_engine_cs {
struct {
/* our mbox written by others */
u32 wait[I915_NUM_ENGINES];
- /* mboxes this ring signals to */
+ /* mboxes this engine signals to */
i915_reg_t signal[I915_NUM_ENGINES];
} mbox;
u64 signal_ggtt[I915_NUM_ENGINES];
@@ -340,7 +340,7 @@ struct intel_engine_cs {

/*
* Table of commands the command parser needs to know about
- * for this ring.
+ * for this engine.
*/
DECLARE_HASHTABLE(cmd_hash, I915_CMD_HASH_ORDER);

@@ -354,11 +354,11 @@ struct intel_engine_cs {
* Returns the bitmask for the length field of the specified command.
* Return 0 for an unrecognized/invalid command.
*
- * If the command parser finds an entry for a command in the ring's
+ * If the command parser finds an entry for a command in the engines's
* cmd_tables, it gets the command's length based on the table entry.
- * If not, it calls this function to determine the per-ring length field
- * encoding for the command (i.e. certain opcode ranges use certain bits
- * to encode the command length in the header).
+ * If not, it calls this function to determine the per-engine length
+ * field encoding for the command (i.e. different opcode ranges use
+ * certain bits to encode the command length in the header).
*/
u32 (*get_cmd_length_mask)(u32 cmd_header);
};
--
2.8.1