From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/cmdparser: Remove stray intel_engine_cs *ring
Date: Mon, 25 Jul 2016 14:01:05 +0300 [thread overview]
Message-ID: <1469444465.5495.52.camel@linux.intel.com> (raw)
In-Reply-To: <1469437590-26709-1-git-send-email-chris@chris-wilson.co.uk>
On ma, 2016-07-25 at 10:06 +0100, Chris Wilson wrote:
> When we refer to intel_engine_cs, we want to use engine so as not to
> confuse ourselves about ringbuffers.
>
> v2: Rename all the functions as well, as well as a few more stray comments.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Link: http://patchwork.freedesktop.org/patch/msgid/1469432687-22756-6-git-send-email-chris@chris-wilson.co.uk
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 72 +++++++++++++++---------------
> drivers/gpu/drm/i915/i915_drv.h | 23 +++++-----
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 14 +++---
> drivers/gpu/drm/i915/intel_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
> drivers/gpu/drm/i915/intel_ringbuffer.h | 10 ++---
> 7 files changed, 64 insertions(+), 61 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index b0fd6a7..8db144b 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -62,23 +62,23 @@
> * The parser always rejects such commands.
> *
> * The majority of the problematic commands fall in the MI_* range, with only a
> - * few specific commands on each ring (e.g. PIPE_CONTROL and MI_FLUSH_DW).
> + * few specific commands on each engine (e.g. PIPE_CONTROL and MI_FLUSH_DW).
> *
> * Implementation:
> - * Each ring maintains tables of commands and registers which the parser uses in
> - * scanning batch buffers submitted to that ring.
> + * Each engine maintains tables of commands and registers which the parser
> + * uses in scanning batch buffers submitted to that engine.
> *
> * Since the set of commands that the parser must check for is significantly
> * smaller than the number of commands supported, the parser tables contain only
> * those commands required by the parser. This generally works because command
> * opcode ranges have standard command length encodings. So for commands that
> * the parser does not need to check, it can easily skip them. This is
> - * implemented via a per-ring length decoding vfunc.
> + * implemented via a per-engine length decoding vfunc.
> *
> * Unfortunately, there are a number of commands that do not follow the standard
> * length encoding for their opcode range, primarily amongst the MI_* commands.
> * To handle this, the parser provides a way to define explicit "skip" entries
> - * in the per-ring command tables.
> + * in the per-engine command tables.
> *
> * Other command table entries map fairly directly to high level categories
> * mentioned above: rejected, master-only, register whitelist. The parser
> @@ -603,7 +603,7 @@ static u32 gen7_blt_get_cmd_length_mask(u32 cmd_header)
> return 0;
> }
>
> -static bool validate_cmds_sorted(struct intel_engine_cs *engine,
> +static bool validate_cmds_sorted(const struct intel_engine_cs *engine,
This otherwise unrelated change is a dependency from a signature change
below.
> const struct drm_i915_cmd_table *cmd_tables,
> int cmd_table_count)
> {
> @@ -624,8 +624,9 @@ static bool validate_cmds_sorted(struct intel_engine_cs *engine,
> u32 curr = desc->cmd.value & desc->cmd.mask;
>
> if (curr < previous) {
> - DRM_ERROR("CMD: table not sorted ring=%d table=%d entry=%d cmd=0x%08X prev=0x%08X\n",
> - engine->id, i, j, curr, previous);
> + DRM_ERROR("CMD: %s [%d] command table not sorted: table=%d entry=%d cmd=0x%08X prev=0x%08X\n",
Cut this line here like;
DRM_ERROR("CMD: %s [%d] command table not sorted: "
"table=%d entry=%d cmd=0x%08X prev=0x%08X\n"
> + engine->name, engine->id,
> + i, j, curr, previous);
Then this cut makes more sense, too.
Apart from that, looks fairly mechanical;
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2016-07-25 11:01 UTC|newest]
Thread overview: 94+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-25 7:44 Refined set of intel_ringbuffer renames Chris Wilson
2016-07-25 7:44 ` [PATCH 01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() Chris Wilson
2016-07-26 4:37 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 02/31] drm/i915: Prefer list_first_entry_or_null Chris Wilson
2016-07-25 7:55 ` Joonas Lahtinen
2016-07-25 8:03 ` Chris Wilson
2016-07-25 10:01 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 03/31] drm/i915: Only clear the client pointer when tearing down the file Chris Wilson
2016-07-25 8:15 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 04/31] drm/i915: Only drop the batch-pool's object reference Chris Wilson
2016-07-25 8:38 ` Joonas Lahtinen
2016-07-25 8:44 ` Chris Wilson
2016-07-25 10:43 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 05/31] drm/i915/cmdparser: Remove stray intel_engine_cs *ring Chris Wilson
2016-07-25 8:40 ` Joonas Lahtinen
2016-07-25 9:06 ` [PATCH v2] " Chris Wilson
2016-07-25 11:01 ` Joonas Lahtinen [this message]
2016-07-25 11:12 ` Chris Wilson
2016-07-25 7:44 ` [PATCH 06/31] drm/i915: Use engine to refer to the user's BSD intel_engine_cs Chris Wilson
2016-07-25 8:42 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 07/31] drm/i915: Avoid using intel_engine_cs *ring for GPU error capture Chris Wilson
2016-07-25 7:44 ` [PATCH 08/31] drm/i915: Remove stray intel_engine_cs ring identifiers from i915_gem.c Chris Wilson
2016-07-25 8:45 ` Joonas Lahtinen
2016-07-25 8:49 ` Chris Wilson
2016-07-26 15:12 ` Dave Gordon
2016-07-25 7:44 ` [PATCH 09/31] drm/i915: Update a couple of hangcheck comments to talk about engines Chris Wilson
2016-07-25 8:46 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 10/31] drm/i915: Unify intel_logical_ring_emit and intel_ring_emit Chris Wilson
2016-07-25 7:44 ` [PATCH 11/31] drm/i915: Rename request->ringbuf to request->ring Chris Wilson
2016-07-25 7:44 ` [PATCH 12/31] drm/i915: Rename backpointer from intel_ringbuffer to intel_engine_cs Chris Wilson
2016-07-25 8:49 ` Joonas Lahtinen
2016-07-25 9:10 ` Chris Wilson
2016-07-25 7:44 ` [PATCH 13/31] drm/i915: Rename intel_context[engine].ringbuf Chris Wilson
2016-07-25 7:44 ` [PATCH 14/31] drm/i915: Rename struct intel_ringbuffer to struct intel_ring Chris Wilson
2016-07-25 7:44 ` [PATCH 15/31] drm/i915: Rename residual ringbuf parameters Chris Wilson
2016-07-25 8:58 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 16/31] drm/i915: Rename intel_pin_and_map_ring() Chris Wilson
2016-07-25 7:44 ` [PATCH 17/31] drm/i915: Remove obsolete engine->gpu_caches_dirty Chris Wilson
2016-07-25 9:14 ` Joonas Lahtinen
2016-07-25 9:24 ` Chris Wilson
2016-07-27 9:49 ` Dave Gordon
2016-07-27 10:00 ` Chris Wilson
2016-07-27 11:18 ` Dave Gordon
2016-07-27 11:26 ` Joonas Lahtinen
2016-07-27 10:53 ` [PATCH] drm/i915: Reduce engine->emit_flush() to a single mode parameter Chris Wilson
2016-07-28 7:11 ` Joonas Lahtinen
2016-07-28 8:37 ` Chris Wilson
2016-07-28 10:03 ` Joonas Lahtinen
2016-07-28 14:57 ` Dave Gordon
2016-07-25 7:44 ` [PATCH 18/31] drm/i915: Simplify request_alloc by returning the allocated request Chris Wilson
2016-07-25 9:18 ` Joonas Lahtinen
2016-07-27 11:08 ` Dave Gordon
2016-07-27 15:28 ` Chris Wilson
2016-07-28 12:48 ` Dave Gordon
2016-07-28 15:10 ` Chris Wilson
2016-07-28 15:20 ` Dave Gordon
2016-07-25 7:44 ` [PATCH 19/31] drm/i915: Unify legacy/execlists emission of MI_BATCHBUFFER_START Chris Wilson
2016-07-25 7:44 ` [PATCH 20/31] drm/i915: Remove intel_ring_get_tail() Chris Wilson
2016-07-25 9:43 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 21/31] drm/i915: Convert engine->write_tail to operate on a request Chris Wilson
2016-07-27 11:53 ` Dave Gordon
2016-07-27 12:29 ` Chris Wilson
2016-07-28 15:05 ` Dave Gordon
2016-07-28 15:09 ` Chris Wilson
2016-07-27 12:30 ` Chris Wilson
2016-07-28 6:41 ` Joonas Lahtinen
2016-07-28 7:12 ` Chris Wilson
2016-07-28 7:52 ` Joonas Lahtinen
2016-07-28 9:16 ` [PATCH 1/2] " Chris Wilson
2016-07-28 9:16 ` [PATCH 2/2] drm/i915: Move the modulus for ring emission to the register write Chris Wilson
2016-07-28 9:59 ` Joonas Lahtinen
2016-07-28 15:16 ` Dave Gordon
2016-07-25 7:44 ` [PATCH 22/31] drm/i915: Unify request submission Chris Wilson
2016-07-25 9:49 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 23/31] drm/i915/lrc: Update function names to match request flow Chris Wilson
2016-07-25 9:50 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 24/31] drm/i915: Stop passing caller's num_dwords to engine->semaphore.signal() Chris Wilson
2016-07-25 9:53 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 25/31] drm/i915: Reuse legacy breadcrumbs + tail emission Chris Wilson
2016-07-28 15:23 ` Dave Gordon
2016-07-28 15:29 ` Chris Wilson
2016-07-28 15:33 ` Dave Gordon
2016-07-25 7:44 ` [PATCH 26/31] drm/i915/ringbuffer: Specialise SNB+ request emission for semaphores Chris Wilson
2016-07-25 9:55 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 27/31] drm/i915: Remove duplicate golden render state init from execlists Chris Wilson
2016-07-25 7:44 ` [PATCH 28/31] drm/i915: Refactor golden render state emission to unconfuse gcc Chris Wilson
2016-07-25 9:59 ` Joonas Lahtinen
2016-07-25 7:44 ` [PATCH 29/31] drm/i915: Unify legacy/execlists submit_execbuf callbacks Chris Wilson
2016-07-25 7:44 ` [PATCH 30/31] drm/i915: Simplify calling engine->sync_to Chris Wilson
2016-07-25 7:44 ` [PATCH 31/31] drm/i915: Rename engine->semaphore.sync_to, engine->sempahore.signal locals Chris Wilson
2016-07-25 8:28 ` ✓ Ro.CI.BAT: success for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() Patchwork
2016-07-25 9:32 ` ✓ Ro.CI.BAT: success for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() (rev2) Patchwork
2016-07-27 11:00 ` ✗ Ro.CI.BAT: failure for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() (rev3) Patchwork
2016-07-28 9:20 ` ✗ Ro.CI.BAT: failure for series starting with [01/31] drm/i915: Reduce breadcrumb lock coverage for intel_engine_enable_signaling() (rev5) Patchwork
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