Re: [PATCH] Revert "drm/i915/chv: Set min freq to efficient frequency on chv"

Deepak S
2016-08-12T10:33:22Z

On 12/08/16 1:04 PM, Jani Nikula wrote:
> On Fri, 12 Aug 2016, deepak.s@linux.intel.com wrote:
>> From: Deepak S <deepak.s@linux.intel.com>
>>
>> With latest Punit FW, vgg input voltag drop falling to minimum is fixed.
>> So reverting the WA patch & moving to turbo freq opreation range to [RPn -> RP0]
> IOW, this patch will regress for anyone who does *not* have the latest
> Punit firmware. Can we check for the firmware version, and act
> accordingly? How does one go about updating the firmware, if at all?
>
> Definitely NAK until the above is cleared.
>
> BR,
> Jani.

I will check with the firmware team when this was released.
I think the fix was added long back, I will confirm.

>
>> This reverts commit 5b7c91b78b1ce6663e0f1f037f6cb4d7c9537d44.
>>
>> commit 5b7c91b78b1ce6663e0f1f037f6cb4d7c9537d44
>> Author: Deepak S <deepak.s@linux.intel.com>
>> Date: Sat May 9 18:15:46 2015 +0530
>>
>> drm/i915/chv: Set min freq to efficient frequency on chv
>>
>> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_pm.c | 21 +++++++++++++++++++--
>> 1 file changed, 19 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 81ab119..e59799a 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -5579,6 +5579,24 @@ static int cherryview_rps_guar_freq(struct drm_i915_private *dev_priv)
>> return rp1;
>> }
>>
>> +static int cherryview_rps_min_freq(struct drm_i915_private *dev_priv)
>> +{
>> + struct drm_device *dev = &dev_priv->drm;
>> + u32 val, rpn;
>> +
>> + if (dev->pdev->revision >= 0x20) {
>> + val = vlv_punit_read(dev_priv, FB_GFX_FMIN_AT_VMIN_FUSE);
>> + rpn = ((val >> FB_GFX_FMIN_AT_VMIN_FUSE_SHIFT) &
>> + FB_GFX_FREQ_FUSE_MASK);
>> + } else { /* For pre-production hardware */
>> + val = vlv_punit_read(dev_priv, PUNIT_GPU_STATUS_REG);
>> + rpn = ((val >> PUNIT_GPU_STATIS_GFX_MIN_FREQ_SHIFT) &
>> + PUNIT_GPU_STATUS_GFX_MIN_FREQ_MASK);
>> + }
>> +
>> + return rpn;
>> +}
>> +
>> static int valleyview_rps_guar_freq(struct drm_i915_private *dev_priv)
>> {
>> u32 val, rp1;
>> @@ -5818,8 +5836,7 @@ static void cherryview_init_gt_powersave(struct drm_i915_private *dev_priv)
>> intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq),
>> dev_priv->rps.rp1_freq);
>>
>> - /* PUnit validated range is only [RPe, RP0] */
>> - dev_priv->rps.min_freq = dev_priv->rps.efficient_freq;
>> + dev_priv->rps.min_freq = cherryview_rps_min_freq(dev_priv);
>> DRM_DEBUG_DRIVER("min GPU freq: %d MHz (%u)\n",
>> intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),
>> dev_priv->rps.min_freq);