* [PATCH 1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite
@ 2016-08-17 17:33 Chris Wilson
2016-08-17 17:33 ` [PATCH 2/2] drm/i915: Fallback to single page pwrite/pread if unable to release fence Chris Wilson
2016-08-18 5:27 ` ✗ Ro.CI.BAT: failure for series starting with [1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite Patchwork
0 siblings, 2 replies; 4+ messages in thread
From: Chris Wilson @ 2016-08-17 17:33 UTC (permalink / raw)
To: intel-gfx
As pwrite does not use the fence for its GTT access, and may even go
through a secondary interface avoiding the main VMA, we cannot treat the
write as automatically invalidated by the hardware and so we require
ORIGIN_CPU frontbufer invalidate/flushes.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a8d0f70c22f9..5fd93c918a01 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1082,7 +1082,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_private *i915,
if (ret)
goto out_unpin;
- intel_fb_obj_invalidate(obj, ORIGIN_GTT);
+ intel_fb_obj_invalidate(obj, ORIGIN_CPU);
obj->dirty = true;
user_data = u64_to_user_ptr(args->data_ptr);
@@ -1149,7 +1149,7 @@ out_flush:
}
}
- intel_fb_obj_flush(obj, false, ORIGIN_GTT);
+ intel_fb_obj_flush(obj, false, ORIGIN_CPU);
out_unpin:
if (node.allocated) {
wmb();
--
2.8.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/i915: Fallback to single page pwrite/pread if unable to release fence
2016-08-17 17:33 [PATCH 1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite Chris Wilson
@ 2016-08-17 17:33 ` Chris Wilson
2016-08-18 7:13 ` Joonas Lahtinen
2016-08-18 5:27 ` ✗ Ro.CI.BAT: failure for series starting with [1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite Patchwork
1 sibling, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2016-08-17 17:33 UTC (permalink / raw)
To: intel-gfx
If we cannot release the fence (for example if someone is inexplicably
trying to write into a tiled framebuffer that is currently pinned to the
display! *cough* kms_frontbuffer_tracking *cough*) fallback to using the
page-by-page pwrite/pread interface, rather than fail the syscall
entirely.
Since this is triggerable by the user (along pwrite) we have to remove
the WARN_ON(fence->pin_count).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 30 ++++++++++++++++++------------
drivers/gpu/drm/i915/i915_gem_fence.c | 2 +-
2 files changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5fd93c918a01..e5dc90e42fc5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -754,6 +754,15 @@ i915_gem_gtt_pread(struct drm_device *dev,
int ret;
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+ if (!IS_ERR(vma)) {
+ node.start = i915_ggtt_offset(vma);
+ node.allocated = false;
+ ret = i915_gem_object_put_fence(obj);
+ if (ret) {
+ i915_vma_unpin(vma);
+ vma = ERR_PTR(ret);
+ }
+ }
if (IS_ERR(vma)) {
ret = insert_mappable_node(dev_priv, &node, PAGE_SIZE);
if (ret)
@@ -766,12 +775,6 @@ i915_gem_gtt_pread(struct drm_device *dev,
}
i915_gem_object_pin_pages(obj);
- } else {
- node.start = i915_ggtt_offset(vma);
- node.allocated = false;
- ret = i915_gem_object_put_fence(obj);
- if (ret)
- goto out_unpin;
}
ret = i915_gem_object_set_to_gtt_domain(obj, false);
@@ -1058,6 +1061,15 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_private *i915,
vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
PIN_MAPPABLE | PIN_NONBLOCK);
+ if (!IS_ERR(vma)) {
+ node.start = i915_ggtt_offset(vma);
+ node.allocated = false;
+ ret = i915_gem_object_put_fence(obj);
+ if (ret) {
+ i915_vma_unpin(vma);
+ vma = ERR_PTR(ret);
+ }
+ }
if (IS_ERR(vma)) {
ret = insert_mappable_node(i915, &node, PAGE_SIZE);
if (ret)
@@ -1070,12 +1082,6 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_private *i915,
}
i915_gem_object_pin_pages(obj);
- } else {
- node.start = i915_ggtt_offset(vma);
- node.allocated = false;
- ret = i915_gem_object_put_fence(obj);
- if (ret)
- goto out_unpin;
}
ret = i915_gem_object_set_to_gtt_domain(obj, true);
diff --git a/drivers/gpu/drm/i915/i915_gem_fence.c b/drivers/gpu/drm/i915/i915_gem_fence.c
index 334c3c4e8357..b0c6c2777725 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence.c
+++ b/drivers/gpu/drm/i915/i915_gem_fence.c
@@ -298,7 +298,7 @@ i915_gem_object_put_fence(struct drm_i915_gem_object *obj)
fence = &dev_priv->fence_regs[obj->fence_reg];
- if (WARN_ON(fence->pin_count))
+ if (fence->pin_count)
return -EBUSY;
i915_gem_object_fence_lost(obj);
--
2.8.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✗ Ro.CI.BAT: failure for series starting with [1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite
2016-08-17 17:33 [PATCH 1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite Chris Wilson
2016-08-17 17:33 ` [PATCH 2/2] drm/i915: Fallback to single page pwrite/pread if unable to release fence Chris Wilson
@ 2016-08-18 5:27 ` Patchwork
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2016-08-18 5:27 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/2] drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite
URL : https://patchwork.freedesktop.org/series/11227/
State : failure
== Summary ==
Series 11227v1 Series without cover letter
http://patchwork.freedesktop.org/api/1.0/series/11227/revisions/1/mbox
Test gem_exec_gttfill:
Subgroup basic:
pass -> SKIP (fi-snb-i7-2600)
Test kms_cursor_legacy:
Subgroup basic-flip-vs-cursor-legacy:
pass -> FAIL (ro-skl3-i5-6260u)
fail -> PASS (ro-bdw-i5-5250u)
Subgroup basic-flip-vs-cursor-varying-size:
pass -> FAIL (ro-byt-n2820)
fi-kbl-qkkr total:244 pass:186 dwarn:30 dfail:0 fail:2 skip:26
fi-skl-i7-6700k total:244 pass:209 dwarn:4 dfail:1 fail:2 skip:28
fi-snb-i7-2600 total:244 pass:201 dwarn:0 dfail:0 fail:0 skip:43
ro-bdw-i5-5250u total:240 pass:220 dwarn:1 dfail:0 fail:0 skip:19
ro-bdw-i7-5600u total:240 pass:207 dwarn:0 dfail:0 fail:1 skip:32
ro-bsw-n3050 total:240 pass:195 dwarn:0 dfail:0 fail:3 skip:42
ro-byt-n2820 total:240 pass:197 dwarn:0 dfail:0 fail:3 skip:40
ro-hsw-i3-4010u total:240 pass:214 dwarn:0 dfail:0 fail:0 skip:26
ro-hsw-i7-4770r total:240 pass:185 dwarn:0 dfail:0 fail:0 skip:55
ro-ilk1-i5-650 total:235 pass:174 dwarn:0 dfail:0 fail:1 skip:60
ro-ivb-i7-3770 total:240 pass:205 dwarn:0 dfail:0 fail:0 skip:35
ro-ivb2-i7-3770 total:240 pass:209 dwarn:0 dfail:0 fail:0 skip:31
ro-skl3-i5-6260u total:240 pass:222 dwarn:0 dfail:0 fail:4 skip:14
ro-bdw-i7-5557U failed to connect after reboot
Results at /archive/results/CI_IGT_test/RO_Patchwork_1908/
e45fdef drm-intel-nightly: 2016y-08m-17d-13h-26m-04s UTC integration manifest
9e2ecfc drm/i915: Fallback to single page pwrite/pread if unable to release fence
c86ccc9 drm/i915: Use ORIGIN_CPU for fb invalidation from pwrite
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] drm/i915: Fallback to single page pwrite/pread if unable to release fence
2016-08-17 17:33 ` [PATCH 2/2] drm/i915: Fallback to single page pwrite/pread if unable to release fence Chris Wilson
@ 2016-08-18 7:13 ` Joonas Lahtinen
0 siblings, 0 replies; 4+ messages in thread
From: Joonas Lahtinen @ 2016-08-18 7:13 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On ke, 2016-08-17 at 18:33 +0100, Chris Wilson wrote:
> If we cannot release the fence (for example if someone is inexplicably
> trying to write into a tiled framebuffer that is currently pinned to the
> display! *cough* kms_frontbuffer_tracking *cough*) fallback to using the
> page-by-page pwrite/pread interface, rather than fail the syscall
> entirely.
>
> Since this is triggerable by the user (along pwrite) we have to remove
> the WARN_ON(fence->pin_count).
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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^ permalink raw reply [flat|nested] 4+ messages in thread
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