From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915: Unlock PPS registers after GPU reset
Date: Wed, 14 Sep 2016 13:04:13 +0300 [thread overview]
Message-ID: <1473847453-4771-1-git-send-email-imre.deak@intel.com> (raw)
Reapply the PPS register unlock workaround after GPU reset on platforms
where the reset clobbers the display HW state. This at least gets rid of
the related WARN during LVDS encoder enabling on PNV.
Fixes: ed6143b8f75 ("drm/i915/lvds: Restore initial HW state during encoder enabling")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 48433e1..8bcffdd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3629,6 +3629,7 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
intel_runtime_pm_disable_interrupts(dev_priv);
intel_runtime_pm_enable_interrupts(dev_priv);
+ intel_pps_unlock_regs_wa(dev_priv);
intel_modeset_init_hw(dev);
spin_lock_irq(&dev_priv->irq_lock);
--
2.5.0
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next reply other threads:[~2016-09-14 10:04 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-14 10:04 Imre Deak [this message]
2016-09-14 10:49 ` ✓ Fi.CI.BAT: success for drm/i915: Unlock PPS registers after GPU reset Patchwork
2016-09-15 7:20 ` Patchwork
2016-09-20 12:32 ` Imre Deak
2016-09-15 10:31 ` [PATCH] " Ville Syrjälä
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