intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
* [PATCH] drm/i915: Unlock PPS registers after GPU reset
@ 2016-09-14 10:04 Imre Deak
  2016-09-14 10:49 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Imre Deak @ 2016-09-14 10:04 UTC (permalink / raw)
  To: intel-gfx

Reapply the PPS register unlock workaround after GPU reset on platforms
where the reset clobbers the display HW state. This at least gets rid of
the related WARN during LVDS encoder enabling on PNV.

Fixes: ed6143b8f75 ("drm/i915/lvds: Restore initial HW state during encoder enabling")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 48433e1..8bcffdd 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3629,6 +3629,7 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
 		intel_runtime_pm_disable_interrupts(dev_priv);
 		intel_runtime_pm_enable_interrupts(dev_priv);
 
+		intel_pps_unlock_regs_wa(dev_priv);
 		intel_modeset_init_hw(dev);
 
 		spin_lock_irq(&dev_priv->irq_lock);
-- 
2.5.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: Unlock PPS registers after GPU reset
  2016-09-14 10:04 [PATCH] drm/i915: Unlock PPS registers after GPU reset Imre Deak
@ 2016-09-14 10:49 ` Patchwork
  2016-09-15  7:20 ` Patchwork
  2016-09-15 10:31 ` [PATCH] " Ville Syrjälä
  2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2016-09-14 10:49 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Unlock PPS registers after GPU reset
URL   : https://patchwork.freedesktop.org/series/12446/
State : success

== Summary ==

Series 12446v1 drm/i915: Unlock PPS registers after GPU reset
https://patchwork.freedesktop.org/api/1.0/series/12446/revisions/1/mbox/

Test gem_exec_suspend:
        Subgroup basic-s3:
                incomplete -> PASS       (fi-hsw-4770k)
Test kms_frontbuffer_tracking:
        Subgroup basic:
                skip       -> PASS       (fi-ivb-3770)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-byt-j1900)
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-j1900)

fi-bdw-5557u     total:244  pass:229  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:244  pass:202  dwarn:0   dfail:0   fail:0   skip:42 
fi-byt-j1900     total:244  pass:212  dwarn:0   dfail:0   fail:1   skip:31 
fi-byt-n2820     total:244  pass:208  dwarn:0   dfail:0   fail:1   skip:35 
fi-hsw-4770k     total:244  pass:226  dwarn:0   dfail:0   fail:0   skip:18 
fi-hsw-4770r     total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22 
fi-ilk-650       total:244  pass:183  dwarn:0   dfail:0   fail:1   skip:60 
fi-ivb-3520m     total:244  pass:219  dwarn:0   dfail:0   fail:0   skip:25 
fi-ivb-3770      total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
fi-skl-6260u     total:244  pass:230  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:244  pass:221  dwarn:0   dfail:0   fail:1   skip:22 
fi-skl-6700k     total:244  pass:219  dwarn:1   dfail:0   fail:0   skip:24 
fi-snb-2520m     total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
fi-snb-2600      total:244  pass:207  dwarn:0   dfail:0   fail:0   skip:37 

Results at /archive/results/CI_IGT_test/Patchwork_2530/

9aa8c0cdbc076bcc0486d7a31922a0f77c032fe7 drm-intel-nightly: 2016y-09m-14d-09h-19m-25s UTC integration manifest
424c774 drm/i915: Unlock PPS registers after GPU reset

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: Unlock PPS registers after GPU reset
  2016-09-14 10:04 [PATCH] drm/i915: Unlock PPS registers after GPU reset Imre Deak
  2016-09-14 10:49 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2016-09-15  7:20 ` Patchwork
  2016-09-20 12:32   ` Imre Deak
  2016-09-15 10:31 ` [PATCH] " Ville Syrjälä
  2 siblings, 1 reply; 5+ messages in thread
From: Patchwork @ 2016-09-15  7:20 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Unlock PPS registers after GPU reset
URL   : https://patchwork.freedesktop.org/series/12446/
State : success

== Summary ==

Series 12446v1 drm/i915: Unlock PPS registers after GPU reset
https://patchwork.freedesktop.org/api/1.0/series/12446/revisions/1/mbox/

Test gem_exec_suspend:
        Subgroup basic-s3:
                incomplete -> PASS       (fi-hsw-4770k)
Test kms_frontbuffer_tracking:
        Subgroup basic:
                skip       -> PASS       (fi-ivb-3770)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-byt-j1900)
        Subgroup suspend-read-crc-pipe-b:
                dmesg-warn -> PASS       (fi-byt-j1900)

fi-bdw-5557u     total:244  pass:229  dwarn:0   dfail:0   fail:0   skip:15 
fi-bsw-n3050     total:244  pass:202  dwarn:0   dfail:0   fail:0   skip:42 
fi-byt-j1900     total:244  pass:212  dwarn:0   dfail:0   fail:1   skip:31 
fi-byt-n2820     total:244  pass:208  dwarn:0   dfail:0   fail:1   skip:35 
fi-hsw-4770k     total:244  pass:226  dwarn:0   dfail:0   fail:0   skip:18 
fi-hsw-4770r     total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22 
fi-ilk-650       total:244  pass:183  dwarn:0   dfail:0   fail:1   skip:60 
fi-ivb-3520m     total:244  pass:219  dwarn:0   dfail:0   fail:0   skip:25 
fi-ivb-3770      total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
fi-skl-6260u     total:244  pass:230  dwarn:0   dfail:0   fail:0   skip:14 
fi-skl-6700hq    total:244  pass:221  dwarn:0   dfail:0   fail:1   skip:22 
fi-skl-6700k     total:244  pass:219  dwarn:1   dfail:0   fail:0   skip:24 
fi-snb-2520m     total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
fi-snb-2600      total:244  pass:207  dwarn:0   dfail:0   fail:0   skip:37 

Results at /archive/results/CI_IGT_test/Patchwork_2530/

9aa8c0cdbc076bcc0486d7a31922a0f77c032fe7 drm-intel-nightly: 2016y-09m-14d-09h-19m-25s UTC integration manifest
424c774 drm/i915: Unlock PPS registers after GPU reset

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH] drm/i915: Unlock PPS registers after GPU reset
  2016-09-14 10:04 [PATCH] drm/i915: Unlock PPS registers after GPU reset Imre Deak
  2016-09-14 10:49 ` ✓ Fi.CI.BAT: success for " Patchwork
  2016-09-15  7:20 ` Patchwork
@ 2016-09-15 10:31 ` Ville Syrjälä
  2 siblings, 0 replies; 5+ messages in thread
From: Ville Syrjälä @ 2016-09-15 10:31 UTC (permalink / raw)
  To: Imre Deak; +Cc: intel-gfx

On Wed, Sep 14, 2016 at 01:04:13PM +0300, Imre Deak wrote:
> Reapply the PPS register unlock workaround after GPU reset on platforms
> where the reset clobbers the display HW state. This at least gets rid of
> the related WARN during LVDS encoder enabling on PNV.
> 
> Fixes: ed6143b8f75 ("drm/i915/lvds: Restore initial HW state during encoder enabling")
> Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 48433e1..8bcffdd 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3629,6 +3629,7 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
>  		intel_runtime_pm_disable_interrupts(dev_priv);
>  		intel_runtime_pm_enable_interrupts(dev_priv);
>  
> +		intel_pps_unlock_regs_wa(dev_priv);
>  		intel_modeset_init_hw(dev);
>  
>  		spin_lock_irq(&dev_priv->irq_lock);
> -- 
> 2.5.0

-- 
Ville Syrjälä
Intel OTC
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: ✓ Fi.CI.BAT: success for drm/i915: Unlock PPS registers after GPU reset
  2016-09-15  7:20 ` Patchwork
@ 2016-09-20 12:32   ` Imre Deak
  0 siblings, 0 replies; 5+ messages in thread
From: Imre Deak @ 2016-09-20 12:32 UTC (permalink / raw)
  To: intel-gfx

On to, 2016-09-15 at 07:20 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Unlock PPS registers after GPU reset
> URL   : https://patchwork.freedesktop.org/series/12446/
> State : success

Thanks for the report and review, I pushed it to -dinq.

> 
> == Summary ==
> 
> Series 12446v1 drm/i915: Unlock PPS registers after GPU reset
> https://patchwork.freedesktop.org/api/1.0/series/12446/revisions/1/mb
> ox/
> 
> Test gem_exec_suspend:
>         Subgroup basic-s3:
>                 incomplete -> PASS       (fi-hsw-4770k)
> Test kms_frontbuffer_tracking:
>         Subgroup basic:
>                 skip       -> PASS       (fi-ivb-3770)
> Test kms_pipe_crc_basic:
>         Subgroup suspend-read-crc-pipe-a:
>                 dmesg-warn -> PASS       (fi-byt-j1900)
>         Subgroup suspend-read-crc-pipe-b:
>                 dmesg-warn -> PASS       (fi-byt-j1900)
> 
> fi-bdw-
> 5557u     total:244  pass:229  dwarn:0   dfail:0   fail:0   skip:15 
> fi-bsw-
> n3050     total:244  pass:202  dwarn:0   dfail:0   fail:0   skip:42 
> fi-byt-
> j1900     total:244  pass:212  dwarn:0   dfail:0   fail:1   skip:31 
> fi-byt-
> n2820     total:244  pass:208  dwarn:0   dfail:0   fail:1   skip:35 
> fi-hsw-
> 4770k     total:244  pass:226  dwarn:0   dfail:0   fail:0   skip:18 
> fi-hsw-
> 4770r     total:244  pass:222  dwarn:0   dfail:0   fail:0   skip:22 
> fi-ilk-
> 650       total:244  pass:183  dwarn:0   dfail:0   fail:1   skip:60 
> fi-ivb-
> 3520m     total:244  pass:219  dwarn:0   dfail:0   fail:0   skip:25 
> fi-ivb-
> 3770      total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
> fi-skl-
> 6260u     total:244  pass:230  dwarn:0   dfail:0   fail:0   skip:14 
> fi-skl-
> 6700hq    total:244  pass:221  dwarn:0   dfail:0   fail:1   skip:22 
> fi-skl-
> 6700k     total:244  pass:219  dwarn:1   dfail:0   fail:0   skip:24 
> fi-snb-
> 2520m     total:244  pass:208  dwarn:0   dfail:0   fail:0   skip:36 
> fi-snb-
> 2600      total:244  pass:207  dwarn:0   dfail:0   fail:0   skip:37 
> 
> Results at /archive/results/CI_IGT_test/Patchwork_2530/
> 
> 9aa8c0cdbc076bcc0486d7a31922a0f77c032fe7 drm-intel-nightly: 2016y-
> 09m-14d-09h-19m-25s UTC integration manifest
> 424c774 drm/i915: Unlock PPS registers after GPU reset
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2016-09-20 12:32 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-09-14 10:04 [PATCH] drm/i915: Unlock PPS registers after GPU reset Imre Deak
2016-09-14 10:49 ` ✓ Fi.CI.BAT: success for " Patchwork
2016-09-15  7:20 ` Patchwork
2016-09-20 12:32   ` Imre Deak
2016-09-15 10:31 ` [PATCH] " Ville Syrjälä

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).