From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH] drm/i915/bxt: Don't set OCL2_LDOFUSE_PWR_DIS bit in phy init sequence Date: Tue, 01 Nov 2016 13:36:11 +0200 Message-ID: <1478000171.2871.2.camel@intel.com> References: <1477998697-22284-1-git-send-email-ander.conselvan.de.oliveira@intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTPS id 62CC86E3D1 for ; Tue, 1 Nov 2016 11:36:13 +0000 (UTC) In-Reply-To: <1477998697-22284-1-git-send-email-ander.conselvan.de.oliveira@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ander Conselvan de Oliveira , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org T24gdGksIDIwMTYtMTEtMDEgYXQgMTM6MTEgKzAyMDAsIEFuZGVyIENvbnNlbHZhbiBkZSBPbGl2 ZWlyYSB3cm90ZToKPiBIYXJkd2FyZSBlbmdpbmVlcnMgY29uZmlybWVkIHRoYXQgd3JpdGluZyB0 byBpdCBoYXMgbm8gZWZmZWN0LCBhcyBpbXBsaWVkIGJ5Cj4gdGhlIEZJWE1FIGNvbW1lbnQuCj4g Cj4gQ2M6IEltcmUgRGVhayA8aW1yZS5kZWFrQGludGVsLmNvbT4KPiBTaWduZWQtb2ZmLWJ5OiBB bmRlciBDb25zZWx2YW4gZGUgT2xpdmVpcmEgPGFuZGVyLmNvbnNlbHZhbi5kZS5vbGl2ZWlyYUBp bnRlbC5jb20+CgpZb3UgY291bGQgYWxzbyByZW1vdmUgdGhlIGNvcnJlc3BvbmRpbmcgY29tbWVu dApmcm9twqBieHRfZGRpX3BoeV92ZXJpZnlfc3RhdGUoKSwgZWl0aGVyIHdheToKClJldmlld2Vk LWJ5OiBJbXJlIERlYWsgPGltcmUuZGVha0BpbnRlbC5jb20+Cgo+IC0tLQo+IMKgZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfZHBpb19waHkuYyB8IDE2IC0tLS0tLS0tLS0tLS0tLS0KPiDCoDEg ZmlsZSBjaGFuZ2VkLCAxNiBkZWxldGlvbnMoLSkKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfZHBpb19waHkuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVs X2RwaW9fcGh5LmMKPiBpbmRleCA0YTYxNjRhLi5lOTViMjkxIDEwMDY0NAo+IC0tLSBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2ludGVsX2RwaW9fcGh5LmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pbnRlbF9kcGlvX3BoeS5jCj4gQEAgLTM2NSwyMiArMzY1LDYgQEAgc3RhdGljIHZvaWQg X2J4dF9kZGlfcGh5X2luaXQoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2LAo+IMKg CQlJOTE1X1dSSVRFKEJYVF9QT1JUX0NMMkNNX0RXNihwaHkpLCB2YWwpOwo+IMKgCX0KPiDCoAo+ IC0JdmFsID0gSTkxNV9SRUFEKEJYVF9QT1JUX0NMMUNNX0RXMzAocGh5KSk7Cj4gLQl2YWwgJj0g fk9DTDJfTERPRlVTRV9QV1JfRElTOwo+IC0JLyoKPiAtCcKgKiBPbiBQSFkxIGRpc2FibGUgcG93 ZXIgb24gdGhlIHNlY29uZCBjaGFubmVsLCBzaW5jZSBubyBwb3J0IGlzCj4gLQnCoCogY29ubmVj dGVkIHRoZXJlLiBPbiBQSFkwIGJvdGggY2hhbm5lbHMgaGF2ZSBhIHBvcnQsIHNvIGxlYXZlIGl0 Cj4gLQnCoCogZW5hYmxlZC4KPiAtCcKgKiBUT0RPOiBwb3J0IEMgaXMgb25seSBjb25uZWN0ZWQg b24gQlhULVAsIHNvIG9uIEJYVDAvMSB3ZSBzaG91bGQKPiAtCcKgKiBwb3dlciBkb3duIHRoZSBz ZWNvbmQgY2hhbm5lbCBvbiBQSFkwIGFzIHdlbGwuCj4gLQnCoCoKPiAtCcKgKiBGSVhNRTogQ2xh cmlmeSBwcm9ncmFtbWluZyBvZiB0aGUgZm9sbG93aW5nLCB0aGUgcmVnaXN0ZXIgaXMKPiAtCcKg KiByZWFkLW9ubHkgd2l0aCBiaXQgNiBmaXhlZCBhdCAwIGF0IGxlYXN0IGluIHN0ZXBwaW5nIEEu Cj4gLQnCoCovCj4gLQlpZiAoIXBoeV9pbmZvLT5kdWFsX2NoYW5uZWwpCj4gLQkJdmFsIHw9IE9D TDJfTERPRlVTRV9QV1JfRElTOwo+IC0JSTkxNV9XUklURShCWFRfUE9SVF9DTDFDTV9EVzMwKHBo eSksIHZhbCk7Cj4gLQo+IMKgCWlmIChwaHlfaW5mby0+cmNvbXBfcGh5ICE9IC0xKSB7Cj4gwqAJ CXVpbnQzMl90IGdyY19jb2RlOwo+IMKgCQkvKgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fXwpJbnRlbC1nZnggbWFpbGluZyBsaXN0CkludGVsLWdmeEBsaXN0 cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9s aXN0aW5mby9pbnRlbC1nZngK