From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] drm/i915: Remove chipset flush after cache flush
Date: Mon, 07 Nov 2016 14:01:46 +0200 [thread overview]
Message-ID: <1478520106.2879.2.camel@linux.intel.com> (raw)
In-Reply-To: <20161106130001.9509-1-chris@chris-wilson.co.uk>
On su, 2016-11-06 at 12:59 +0000, Chris Wilson wrote:
> We always flush the chipset prior to executing with the GPU, so we can
> skip the flush during ordinary domain management.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Maybe even add?
Fixes: dcd79934b0dd ("drm/i915: Unconditionally flush any chipset buffers before execbuf")
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2016-11-07 12:01 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-06 12:59 [PATCH 1/3] drm/i915: Remove chipset flush after cache flush Chris Wilson
2016-11-06 13:00 ` [PATCH 2/3] drm/i915: Always flush the dirty CPU cache when pinning the scanout Chris Wilson
2016-11-08 11:33 ` Ville Syrjälä
2016-11-08 11:42 ` Chris Wilson
2016-11-08 13:45 ` Ville Syrjälä
2016-11-06 13:00 ` [PATCH 3/3] drm/i915: Mark all skipped clflushes as leaving the CPU cache dirty Chris Wilson
2016-11-06 13:45 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Remove chipset flush after cache flush Patchwork
2016-11-07 12:01 ` Joonas Lahtinen [this message]
2016-11-07 12:10 ` [PATCH 1/3] " Chris Wilson
2016-11-07 16:16 ` Joonas Lahtinen
2016-11-08 11:08 ` Chris Wilson
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