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From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Mahesh Kumar <mahesh1.kumar@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4 1/8] drm/i915/skl+: use linetime latency instead of ddb size
Date: Wed, 09 Nov 2016 15:02:23 -0200	[thread overview]
Message-ID: <1478710943.19391.24.camel@intel.com> (raw)
In-Reply-To: <0a682d66-7672-d14a-f644-dae35cec82d5@intel.com>

Em Qua, 2016-11-09 às 20:28 +0530, Mahesh Kumar escreveu:
> Hi,
> 
> 
> On Monday 31 October 2016 11:33 PM, Paulo Zanoni wrote:
> > 
> > Em Qui, 2016-10-13 às 16:28 +0530, Kumar, Mahesh escreveu:
> > > 
> > > This patch make changes to use linetime latency instead of
> > > allocated
> > > DDB size during plane watermark calculation in switch case, This
> > > is
> > > required to implement new DDB allocation algorithm.
> > > 
> > > In New Algorithm DDB is allocated based on WM values, because of
> > > which
> > > number of DDB blocks will not be available during WM calculation,
> > > So this "linetime latency" is suggested by SV/HW team to use
> > > during
> > > switch-case for WM blocks selection.
> > > 
> > > Changes since v1:
> > >   - Rebase on top of Paulo's patch series
> > > Changes since v2:
> > >   - Fix if-else condition (pointed by Maarten)
> > > 
> > > Signed-off-by: "Kumar, Mahesh" <mahesh1.kumar@intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/intel_pm.c | 6 +++++-
> > >   1 file changed, 5 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c
> > > b/drivers/gpu/drm/i915/intel_pm.c
> > > index 7f1748a..098336d 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -3616,10 +3616,14 @@ static int skl_compute_plane_wm(const
> > > struct
> > > drm_i915_private *dev_priv,
> > >   	    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
> > >   		selected_result = max(method2, y_tile_minimum);
> > >   	} else {
> > > +		uint32_t linetime_us = 0;
> > > +
> > > +		linetime_us = DIV_ROUND_UP(width * 1000,
> > > +				skl_pipe_pixel_rate(cstate));
> > Can't we just call skl_compute_linetime_wm() here? I don't like
> > having
> > two pieces of the code computing the same thing. My last round of
> > bug
> > fixes included a fix for duplicated code that got out of sync after
> > spec changes.
> These two have different values in skl_compute_linetime_wm we
> multiply 
> by 8, not here.

You can move the *8 multiplication to the caller that needs it.


> > 
> > 
> > > 
> > >   		if ((cpp * cstate-
> > > >base.adjusted_mode.crtc_htotal /
> > > 512 < 1) &&
> > >   		    (plane_bytes_per_line / 512 < 1))
> > >   			selected_result = method2;
> > > -		else if ((ddb_allocation /
> > > plane_blocks_per_line) >=
> > > 1)
> > > +		else if (latency >= linetime_us)
> > Still doesn't match the spec. The "ddb_allocation /
> > planes_block_per_line" is still necessary.
> After New algorithm patch, we will not have access to ddb_allocation,
> as 
> allocation will happen later.
> So we can't use ddb_allocation in our calculation, This check in
> Bspec 
> is kept for the environment/OS where we don't allocate DDB
> dynamically.
> hence those OS will have access to ddb_allocation during WM
> calculation 
> phase.
> thanks,

So the patch that implements the DDB allocation can remove the check
when/if it gets merged. The code with only this patch does not use the
new algorithm, so let's make everything works if we only have it
applied. Bisectability is really important.

> 
> Regards,
> -Mahesh
> > 
> > 
> > > 
> > >   			selected_result = min(method1,
> > > method2);
> > >   		else
> > >   			selected_result = method1;
> 
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  reply	other threads:[~2016-11-09 17:02 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-13 10:58 [PATCH v4 0/8] New DDB Algo and WM fixes Kumar, Mahesh
2016-10-13 10:58 ` [PATCH v4 1/8] drm/i915/skl+: use linetime latency instead of ddb size Kumar, Mahesh
2016-10-31 18:03   ` Paulo Zanoni
2016-11-09 14:58     ` Mahesh Kumar
2016-11-09 17:02       ` Paulo Zanoni [this message]
2016-10-13 10:58 ` [PATCH v4 2/8] drm/i915/skl: New ddb allocation algorithm Kumar, Mahesh
2016-11-04 19:25   ` Paulo Zanoni
2016-10-13 10:58 ` [PATCH v4 3/8] drm/i915: Decode system memory bandwidth Kumar, Mahesh
2016-11-03 19:06   ` Paulo Zanoni
2016-11-16 11:48     ` Mahesh Kumar
2016-10-13 10:58 ` [PATCH v4 4/8] drm/i915/gen9: WM memory bandwidth related workaround Kumar, Mahesh
2016-11-04 17:09   ` Paulo Zanoni
2016-11-04 17:22     ` Ville Syrjälä
2016-11-10  5:54     ` Mahesh Kumar
2016-11-16 12:36       ` Paulo Zanoni
2016-10-13 10:58 ` [PATCH v4 5/8] drm/i915/skl+: reset y_plane ddb structure also during calculation Kumar, Mahesh
2016-11-04 17:39   ` Paulo Zanoni
2016-10-13 10:58 ` [PATCH v4 6/8] drm/i915/skl: Add variables to check x_tile and y_tile Kumar, Mahesh
2016-11-04 17:45   ` Paulo Zanoni
2016-10-13 10:58 ` [PATCH v4 7/8] drm/i915/skl+: change WM calc to fixed point 16.16 Kumar, Mahesh
2016-11-04 19:03   ` Paulo Zanoni
2016-10-13 10:58 ` [PATCH v4 8/8] drm/i915/bxt: Enable IPC support Kumar, Mahesh
2016-10-13 11:19   ` Maarten Lankhorst
2016-10-13 13:01     ` Mahesh Kumar
2016-10-13 15:36       ` Daniel Vetter
2016-11-04 19:20   ` Paulo Zanoni
2016-10-13 13:50 ` ✗ Fi.CI.BAT: warning for New DDB Algo and WM fixes (rev4) Patchwork

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