From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Tom O'Rourke <Tom.O'Rourke@intel.com>
Subject: [PATCH v5 02/22] drm/i915/slpc: Expose GuC functions for use with SLPC
Date: Mon, 14 Nov 2016 16:07:09 +0530 [thread overview]
Message-ID: <1479119849-20187-3-git-send-email-sagar.a.kamble@intel.com> (raw)
In-Reply-To: <1479119849-20187-1-git-send-email-sagar.a.kamble@intel.com>
From: Tom O'Rourke <Tom.O'Rourke@intel.com>
Expose host2guc_action for use by SLPC in intel_slpc.c.
Expose functions to allocate and release objects used
by GuC to be used for SLPC shared memory object.
v1: Updated function names as they need to be made extern. (ChrisW)
v2-v4: Rebase
v5: Commit subject update.
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
drivers/gpu/drm/i915/i915_guc_submission.c | 22 +++++++++++-----------
drivers/gpu/drm/i915/intel_guc.h | 2 ++
2 files changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 666dab7..c171f1f 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -49,7 +49,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See host2guc_action()
+ * See i915_guc_action()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -77,7 +77,7 @@ static inline bool host2guc_action_response(struct drm_i915_private *dev_priv,
return GUC2HOST_IS_RESPONSE(val);
}
-static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
+int i915_guc_action(struct intel_guc *guc, u32 *data, u32 len)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 status;
@@ -143,7 +143,7 @@ static int host2guc_allocate_doorbell(struct intel_guc *guc,
data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return i915_guc_action(guc, data, 2);
}
static int host2guc_release_doorbell(struct intel_guc *guc,
@@ -154,7 +154,7 @@ static int host2guc_release_doorbell(struct intel_guc *guc,
data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return i915_guc_action(guc, data, 2);
}
static int host2guc_sample_forcewake(struct intel_guc *guc,
@@ -171,7 +171,7 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
/* bit 0 and 1 are for Render and Media domain separately */
data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return i915_guc_action(guc, data, ARRAY_SIZE(data));
}
static int host2guc_logbuffer_flush_complete(struct intel_guc *guc)
@@ -180,7 +180,7 @@ static int host2guc_logbuffer_flush_complete(struct intel_guc *guc)
data[0] = HOST2GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE;
- return host2guc_action(guc, data, 1);
+ return i915_guc_action(guc, data, 1);
}
static int host2guc_force_logbuffer_flush(struct intel_guc *guc)
@@ -190,7 +190,7 @@ static int host2guc_force_logbuffer_flush(struct intel_guc *guc)
data[0] = HOST2GUC_ACTION_FORCE_LOG_BUFFER_FLUSH;
data[1] = 0;
- return host2guc_action(guc, data, 2);
+ return i915_guc_action(guc, data, 2);
}
static int host2guc_logging_control(struct intel_guc *guc, u32 control_val)
@@ -200,7 +200,7 @@ static int host2guc_logging_control(struct intel_guc *guc, u32 control_val)
data[0] = HOST2GUC_ACTION_UK_LOG_ENABLE_LOGGING;
data[1] = control_val;
- return host2guc_action(guc, data, 2);
+ return i915_guc_action(guc, data, 2);
}
/*
@@ -672,7 +672,7 @@ static void i915_guc_submit(struct drm_i915_gem_request *rq)
*
* Return: A i915_vma if successful, otherwise an ERR_PTR.
*/
-static struct i915_vma *guc_allocate_vma(struct intel_guc *guc, u32 size)
+struct i915_vma *guc_allocate_vma(struct intel_guc *guc, u32 size)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
struct drm_i915_gem_object *obj;
@@ -1583,7 +1583,7 @@ int intel_guc_suspend(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return i915_guc_action(guc, data, ARRAY_SIZE(data));
}
@@ -1611,7 +1611,7 @@ int intel_guc_resume(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return i915_guc_action(guc, data, ARRAY_SIZE(data));
}
void i915_guc_capture_logs(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 0053258..dad4a23 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -189,5 +189,7 @@ struct intel_guc {
void i915_guc_register(struct drm_i915_private *dev_priv);
void i915_guc_unregister(struct drm_i915_private *dev_priv);
int i915_guc_log_control(struct drm_i915_private *dev_priv, u64 control_val);
+int i915_guc_action(struct intel_guc *guc, u32 *data, u32 len);
+struct i915_vma *guc_allocate_vma(struct intel_guc *guc, u32 size);
#endif
--
1.9.1
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next prev parent reply other threads:[~2016-11-14 10:35 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-14 10:37 [PATCH v5 00/22] Add support for GuC-based SLPC Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 01/22] drm/i915/gen9: Separate RPS and RC6 handling Sagar Arun Kamble
2016-11-14 10:37 ` Sagar Arun Kamble [this message]
2016-11-14 10:37 ` [PATCH v5 03/22] drm/i915/slpc: Add has_slpc capability flag Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 04/22] drm/i915/slpc: Add enable_slpc module parameter Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 05/22] drm/i915/slpc: Sanitize GuC version Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 06/22] drm/i915/slpc: Use intel_slpc_* functions if supported Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 07/22] drm/i915/slpc: Enable SLPC in GuC " Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 08/22] drm/i915/slpc: If using SLPC, do not set frequency Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 09/22] drm/i915/slpc: Allocate/Release/Initialize SLPC shared data Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 10/22] drm/i915/slpc: Update debugfs interfaces for frequency parameters Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 11/22] drm/i915/slpc: Add slpc communication interfaces Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 12/22] drm/i915/slpc: Send reset event and handle SLPC enabling Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 13/22] drm/i915/slpc: Send shutdown event Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 14/22] drm/i915/slpc: Add parameter unset/set/get functions Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 15/22] drm/i915/slpc: Add support for min/max frequency control Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 16/22] drm/i915/slpc: Add enable/disable controls for slpc tasks Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 17/22] drm/i915/slpc: Add i915_slpc_info to debugfs Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 18/22] drm/i915/slpc: Only enable GTPERF task, Disable other tasks/parameters Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 19/22] drm/i915/slpc: Preserve min/max frequency softlimits on re-activation Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 20/22] drm/i915/slpc: Add SKL SLPC Support Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 21/22] drm/i915/slpc: Add Broxton SLPC support Sagar Arun Kamble
2016-11-14 10:37 ` [PATCH v5 22/22] drm/i915/slpc: Enable SLPC, where supported Sagar Arun Kamble
2016-11-14 11:17 ` ✓ Fi.CI.BAT: success for Add support for GuC-based SLPC (rev6) Patchwork
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