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From: Min He <min.he@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v3] drm/i915: fix the dequeue logic for single_port_submission context
Date: Wed, 16 Nov 2016 22:05:04 +0800	[thread overview]
Message-ID: <1479305104-17049-1-git-send-email-min.he@intel.com> (raw)

For a singl_port_submission context, it can only be submitted to port 0,
and there shouldn't be any other context in port 1 at the same time. This
is required by GVT-g context to have an opportunity to save/restore some
non-hw context render registers.
This patch is to implement the correct logic in execlists_dequeue.

v2: optimized code by following Chris's advice, and added more comments to
explain the patch.
v3: followed the coding style.

Signed-off-by: Min He <min.he@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index f50feaa..b2c0d50 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -499,7 +499,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine)
 			 * context (even though a different request) to
 			 * the second port.
 			 */
-			if (ctx_single_port_submission(cursor->ctx))
+			if (ctx_single_port_submission(last->ctx) ||
+			    ctx_single_port_submission(cursor->ctx))
 				break;
 
 			GEM_BUG_ON(last->ctx == cursor->ctx);
-- 
1.9.1

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             reply	other threads:[~2016-11-16 14:14 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-16 14:05 Min He [this message]
2016-11-16 15:16 ` ✓ Fi.CI.BAT: success for drm/i915: fix the dequeue logic for single_port_submission context (rev3) Patchwork
2016-11-17  5:41 ` [PATCH v3] drm/i915: fix the dequeue logic for single_port_submission context Zhenyu Wang
2016-11-17  8:00 ` Chris Wilson
2016-11-17  8:08   ` He, Min

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