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From: Imre Deak <imre.deak@intel.com>
To: "Chris Wilson" <chris@chris-wilson.co.uk>,
	"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 2/2] drm/i915/skl: Increase PCODE CDCLK change notify timeout
Date: Mon, 28 Nov 2016 13:12:13 +0200	[thread overview]
Message-ID: <1480331533.24456.15.camel@intel.com> (raw)
In-Reply-To: <20161125114400.GJ26057@nuc-i3427.alporthouse.com>

On pe, 2016-11-25 at 11:44 +0000, Chris Wilson wrote:
> On Fri, Nov 25, 2016 at 01:30:38PM +0200, Ville Syrjälä wrote:
> > On Fri, Nov 25, 2016 at 12:57:01PM +0200, Imre Deak wrote:
> > > commit 848496e5902833600f7992f4faa82dc1546051ba
> > > Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Date:   Wed Jul 13 16:32:03 2016 +0300
> > > 
> > >     drm/i915: Wait up to 3ms for the pcu to ack the cdclk change
> > > request on SKL
> > > 
> > > increased the timeout to match the spec, but we still see a
> > > timeout on
> > > at least one SKL. A CDCLK change request following the failed one
> > > will
> > > succeed nevertheless, so let's try to increase the timeout to
> > > 10ms.
> > > 
> > > v2:
> > > - Use 1ms poll period instead of 10us. (Chris)
> > 
> > I'm not sure that's what we want. IIRC the spec says no delay
> > between
> > attempts, so I'm not sure this isn't just going to make it more
> > likely
> > to fail.
> 
> Hmm. We're going to be scheduled away eventually, unless we steal the
> cpu for 10ms. To be strict to the spec we would need
> 
> 	preempt_disable();
> 	ret = wait_for_atomic(pcu_ready(), 10);
> 	preempt_enable();
> 
> 	return ret;

Yes, after some testing it looks like when things fail we call
pcu_ready() only once after scheduling away for 3ms and so if that one
call fails we time out. So I think we need preempt_disable(), I updated
the patch adding that.

--Imre
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  reply	other threads:[~2016-11-28 11:12 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-24 15:32 [PATCH 1/2] drm/i915/gen6+: Clear upper data byte during PCODE write Imre Deak
2016-11-24 15:32 ` [PATCH 2/2] drm/i915/skl: Increase PCODE CDCLK change notify timeout Imre Deak
2016-11-25  9:23   ` Chris Wilson
2016-11-25  9:32     ` Chris Wilson
2016-11-25 10:57   ` [PATCH v2 " Imre Deak
2016-11-25 11:00     ` Chris Wilson
2016-11-25 11:30     ` Ville Syrjälä
2016-11-25 11:44       ` Chris Wilson
2016-11-28 11:12         ` Imre Deak [this message]
2016-11-24 15:38 ` [PATCH 1/2] drm/i915/gen6+: Clear upper data byte during PCODE write Chris Wilson
2016-11-24 15:47 ` Ville Syrjälä
2016-11-24 17:15 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
2016-11-25 11:15 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gen6+: Clear upper data byte during PCODE write (rev2) Patchwork

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