From: "Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>
Cc: "daniel.vetter@ffwll.ch" <daniel.vetter@ffwll.ch>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH 2/3] drm/dp/mst: Calculate total link bandwidth instead of hardcoding it
Date: Tue, 29 Nov 2016 21:04:27 +0000 [thread overview]
Message-ID: <1480454507.3281.6.camel@dk-H97M-D3H> (raw)
In-Reply-To: <20161129205809.GA31595@intel.com>
On Tue, 2016-11-29 at 22:58 +0200, Ville Syrjälä wrote:
> On Thu, Nov 17, 2016 at 06:03:47PM -0800, Dhinakaran Pandiyan wrote:
> > The total or the nominal link bandwidth, which we save in terms of PBN, is
> > a factor of link rate and lane count. But, currently we hardcode it to
> > 2560 PBN. This results in incorrect computation of total slots.
> >
> > E.g, 2 lane HBR2 configuration and 4k@60Hz, 24bpp mode
> > nominal link bw = 1080 MBps = 1280PBN = 64 slots
> > required bw 533.25 MHz*3 = 1599.75 MBps or 1896 PBN
> > with +0.6% margin = 1907.376 PBN = 96 slots
> > This is greater than the max. possible value of 64 slots. But, we
> > incorrectly compute available slots as 2560 PBN = 128 slots and don't
> > return error.
> >
> > So, let's fix this by calculating the total link bandwidth as
> > link bw (PBN) = BW per time slot(PBN) * max. time slots , where max. time
> > slots is 64
> >
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> > drivers/gpu/drm/drm_dp_mst_topology.c | 5 ++---
> > 1 file changed, 2 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
> > index 04e4571..26dfd99 100644
> > --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> > @@ -2038,9 +2038,8 @@ int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool ms
> > ret = -EINVAL;
> > goto out_unlock;
> > }
> > -
> > - mgr->total_pbn = 2560;
> > - mgr->total_slots = DIV_ROUND_UP(mgr->total_pbn, mgr->pbn_div);
> > + mgr->total_pbn = 64 * mgr->pbn_div;
>
> Do we actually have a use in mind for total_pbn? It seems unused now.
Not really, I will remove it and submit this patch separately.
>
> > + mgr->total_slots = 64;
>
> Same for total_slots.
>
> > mgr->avail_slots = mgr->total_slots;
>
> So avail_slots is all that's used. And shouldn't it actually start
> out at 63 instead of 64 on account of the MTP header always taking
> up one slot?
>
Yeah, I had a check for < avail_slots in the patch that followed.
-DK
> >
> > /* add initial branch device at LCT 1 */
> > --
> > 2.7.4
>
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next prev parent reply other threads:[~2016-11-29 21:04 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-18 2:03 [PATCH 0/3] Track available link bandwidth for DP MST Dhinakaran Pandiyan
2016-11-18 2:03 ` [PATCH 1/3] drm/i915/dp: Fail DP MST config when there are not enough vcpi slots Dhinakaran Pandiyan
2016-11-18 8:43 ` Daniel Vetter
2016-11-18 9:17 ` Daniel Vetter
2016-11-19 0:04 ` Pandiyan, Dhinakaran
2016-11-21 9:09 ` [Intel-gfx] " Daniel Vetter
2016-11-18 2:03 ` [PATCH 2/3] drm/dp/mst: Calculate total link bandwidth instead of hardcoding it Dhinakaran Pandiyan
2016-11-19 2:01 ` Pandiyan, Dhinakaran
2016-11-29 20:58 ` Ville Syrjälä
2016-11-29 21:04 ` Pandiyan, Dhinakaran [this message]
2016-11-18 2:03 ` [PATCH 3/3] drm/dp/mst: Track available time slots in DP Multi-Stream Transport Packet Dhinakaran Pandiyan
2016-11-18 5:53 ` kbuild test robot
2016-11-18 6:19 ` Manasi Navare
2016-11-18 6:57 ` [Intel-gfx] " Chris Wilson
2016-11-18 8:44 ` Daniel Vetter
2016-11-19 0:07 ` Pandiyan, Dhinakaran
2016-11-18 8:16 ` ✓ Fi.CI.BAT: success for Track available link bandwidth for DP MST Patchwork
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