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From: Ander Conselvan De Oliveira <conselvan2@gmail.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 02/14] drm/i915: Nuke intel_mode_max_pixclk()
Date: Tue, 20 Dec 2016 15:22:31 +0200	[thread overview]
Message-ID: <1482240151.5778.25.camel@gmail.com> (raw)
In-Reply-To: <20161219172840.31842-3-ville.syrjala@linux.intel.com>

On Mon, 2016-12-19 at 19:28 +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> ilk_max_pixel_rate() will now give the "correct" pixel rate for all
> platforms, so let's kill rename it to intel_max_pixel_rate() and kill

Typo: "kill rename". With that fixed,

Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>

> off intel_mode_max_pixclk().
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 41 ++++++-----------------------------
> -
>  1 file changed, 6 insertions(+), 35 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 1d979041c52c..1e3f173a70e5 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -123,7 +123,7 @@ static void ironlake_pfit_disable(struct intel_crtc *crtc,
> bool force);
>  static void ironlake_pfit_enable(struct intel_crtc *crtc);
>  static void intel_modeset_setup_hw_state(struct drm_device *dev);
>  static void intel_pre_disable_primary_noatomic(struct drm_crtc *crtc);
> -static int ilk_max_pixel_rate(struct drm_atomic_state *state);
> +static int intel_max_pixel_rate(struct drm_atomic_state *state);
>  static int glk_calc_cdclk(int max_pixclk);
>  static int bxt_calc_cdclk(int max_pixclk);
>  
> @@ -6566,40 +6566,11 @@ static int bxt_calc_cdclk(int max_pixclk)
>  		return 144000;
>  }
>  
> -/* Compute the max pixel clock for new configuration. */
> -static int intel_mode_max_pixclk(struct drm_device *dev,
> -				 struct drm_atomic_state *state)
> -{
> -	struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> -	struct drm_i915_private *dev_priv = to_i915(dev);
> -	struct drm_crtc *crtc;
> -	struct drm_crtc_state *crtc_state;
> -	unsigned max_pixclk = 0, i;
> -	enum pipe pipe;
> -
> -	memcpy(intel_state->min_pixclk, dev_priv->min_pixclk,
> -	       sizeof(intel_state->min_pixclk));
> -
> -	for_each_crtc_in_state(state, crtc, crtc_state, i) {
> -		int pixclk = 0;
> -
> -		if (crtc_state->enable)
> -			pixclk = crtc_state->adjusted_mode.crtc_clock;
> -
> -		intel_state->min_pixclk[i] = pixclk;
> -	}
> -
> -	for_each_pipe(dev_priv, pipe)
> -		max_pixclk = max(intel_state->min_pixclk[pipe], max_pixclk);
> -
> -	return max_pixclk;
> -}
> -
>  static int valleyview_modeset_calc_cdclk(struct drm_atomic_state *state)
>  {
>  	struct drm_device *dev = state->dev;
>  	struct drm_i915_private *dev_priv = to_i915(dev);
> -	int max_pixclk = intel_mode_max_pixclk(dev, state);
> +	int max_pixclk = intel_max_pixel_rate(state);
>  	struct intel_atomic_state *intel_state =
>  		to_intel_atomic_state(state);
>  
> @@ -6615,7 +6586,7 @@ static int valleyview_modeset_calc_cdclk(struct
> drm_atomic_state *state)
>  static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->dev);
> -	int max_pixclk = ilk_max_pixel_rate(state);
> +	int max_pixclk = intel_max_pixel_rate(state);
>  	struct intel_atomic_state *intel_state =
>  		to_intel_atomic_state(state);
>  	int cdclk;
> @@ -10290,7 +10261,7 @@ static int bdw_adjust_min_pipe_pixel_rate(struct
> intel_crtc_state *crtc_state,
>  }
>  
>  /* compute the max rate for new configuration */
> -static int ilk_max_pixel_rate(struct drm_atomic_state *state)
> +static int intel_max_pixel_rate(struct drm_atomic_state *state)
>  {
>  	struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
>  	struct drm_i915_private *dev_priv = to_i915(state->dev);
> @@ -10422,7 +10393,7 @@ static int broadwell_modeset_calc_cdclk(struct
> drm_atomic_state *state)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(state->dev);
>  	struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
> -	int max_pixclk = ilk_max_pixel_rate(state);
> +	int max_pixclk = intel_max_pixel_rate(state);
>  	int cdclk;
>  
>  	/*
> @@ -10458,7 +10429,7 @@ static int skl_modeset_calc_cdclk(struct
> drm_atomic_state *state)
>  {
>  	struct intel_atomic_state *intel_state =
> to_intel_atomic_state(state);
>  	struct drm_i915_private *dev_priv = to_i915(state->dev);
> -	const int max_pixclk = ilk_max_pixel_rate(state);
> +	const int max_pixclk = intel_max_pixel_rate(state);
>  	int vco = intel_state->cdclk_pll_vco;
>  	int cdclk;
>  
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  reply	other threads:[~2016-12-20 13:22 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-19 17:28 [PATCH v2 00/14] drm/i915: Introduce intel_cdclk_state (v2) ville.syrjala
2016-12-19 17:28 ` [PATCH 01/14] drm/i915: Store the pipe pixel rate in the crtc state ville.syrjala
2016-12-20 13:10   ` Ander Conselvan De Oliveira
2016-12-20 13:29     ` Ville Syrjälä
2017-01-12 20:37       ` Rodrigo Vivi
2017-01-13  9:50         ` Ville Syrjälä
2016-12-19 17:28 ` [PATCH 02/14] drm/i915: Nuke intel_mode_max_pixclk() ville.syrjala
2016-12-20 13:22   ` Ander Conselvan De Oliveira [this message]
2016-12-19 17:28 ` [PATCH 03/14] drm/i915: s/get_display_clock_speed/get_cdclk/ ville.syrjala
2016-12-20 13:27   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder ville.syrjala
2016-12-20 13:42   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 05/14] drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c ville.syrjala
2016-12-22 13:10   ` Ander Conselvan De Oliveira
2016-12-22 13:16     ` Joonas Lahtinen
2016-12-19 17:28 ` [PATCH 06/14] drm/i915: Pass computed vco to bxt_set_cdclk() ville.syrjala
2016-12-22 13:22   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 07/14] drm/i915: Start moving the cdclk stuff into a distinct state structure ville.syrjala
2016-12-22 14:14   ` Ander Conselvan De Oliveira
2016-12-22 14:33     ` Ville Syrjälä
2016-12-23  9:09       ` Ander Conselvan De Oliveira
2016-12-23 12:27         ` Ville Syrjälä
2016-12-23 13:07           ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 08/14] drm/i915: Track full cdclk state for the logical and actual cdclk frequencies ville.syrjala
2016-12-23 11:53   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 09/14] drm/i915: Pass dev_priv to remainder of the cdclk functions ville.syrjala
2016-12-23 12:01   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 10/14] drm/i915: Pass the cdclk state to the set_cdclk() functions ville.syrjala
2016-12-23 13:43   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 11/14] drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk() ville.syrjala
2016-12-23 13:49   ` Ander Conselvan De Oliveira
2016-12-23 14:07     ` Ville Syrjälä
2016-12-19 17:28 ` [PATCH 12/14] drm/i915: Nuke the VLV/CHV PFI programming power domain workaround ville.syrjala
2016-12-23 13:52   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 13/14] drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook ville.syrjala
2016-12-23 14:03   ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 14/14] drm/i915: Move ilk_pipe_pixel_rate() to intel_display.c ville.syrjala
2016-12-23 14:06   ` Ander Conselvan De Oliveira
2016-12-19 18:15 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce intel_cdclk_state (rev2) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2016-12-19 12:34 [PATCH 00/14] drm/i915: Introduce intel_cdclk_state ville.syrjala
2016-12-19 12:34 ` [PATCH 02/14] drm/i915: Nuke intel_mode_max_pixclk() ville.syrjala

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