From: Ander Conselvan De Oliveira <conselvan2@gmail.com>
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 12/14] drm/i915: Nuke the VLV/CHV PFI programming power domain workaround
Date: Fri, 23 Dec 2016 15:52:20 +0200 [thread overview]
Message-ID: <1482501140.2633.62.camel@gmail.com> (raw)
In-Reply-To: <20161219172840.31842-13-ville.syrjala@linux.intel.com>
On Mon, 2016-12-19 at 19:28 +0200, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The hack to grab the pipe A power domain around VLV/CHV cdclk
> programming has surely outlived its usefulness. We should be
> hold sufficient power domains during any modeset, so let's just
hold/be holding?
Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>
> nuke this hack.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_cdclk.c | 14 --------------
> 1 file changed, 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index fe7a9e3a4f29..bba077c4bd56 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1421,24 +1421,10 @@ static void vlv_modeset_commit_cdclk(struct
> drm_atomic_state *old_state)
> {
> struct drm_i915_private *dev_priv = to_i915(old_state->dev);
>
> - /*
> - * FIXME: We can end up here with all power domains off, yet
> - * with a CDCLK frequency other than the minimum. To account
> - * for this take the PIPE-A power domain, which covers the HW
> - * blocks needed for the following programming. This can be
> - * removed once it's guaranteed that we get here either with
> - * the minimum CDCLK set, or the required power domains
> - * enabled.
> - */
> - intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
> -
> if (IS_CHERRYVIEW(dev_priv))
> chv_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
> else
> vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
> -
> -
> - intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A);
> }
>
> static int bdw_modeset_calc_cdclk(struct drm_atomic_state *state)
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next prev parent reply other threads:[~2016-12-23 13:52 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-19 17:28 [PATCH v2 00/14] drm/i915: Introduce intel_cdclk_state (v2) ville.syrjala
2016-12-19 17:28 ` [PATCH 01/14] drm/i915: Store the pipe pixel rate in the crtc state ville.syrjala
2016-12-20 13:10 ` Ander Conselvan De Oliveira
2016-12-20 13:29 ` Ville Syrjälä
2017-01-12 20:37 ` Rodrigo Vivi
2017-01-13 9:50 ` Ville Syrjälä
2016-12-19 17:28 ` [PATCH 02/14] drm/i915: Nuke intel_mode_max_pixclk() ville.syrjala
2016-12-20 13:22 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 03/14] drm/i915: s/get_display_clock_speed/get_cdclk/ ville.syrjala
2016-12-20 13:27 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 04/14] drm/i915: Clean up the .get_cdclk() assignment if ladder ville.syrjala
2016-12-20 13:42 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 05/14] drm/i915: Move most cdclk/rawclk related code to intel_cdclk.c ville.syrjala
2016-12-22 13:10 ` Ander Conselvan De Oliveira
2016-12-22 13:16 ` Joonas Lahtinen
2016-12-19 17:28 ` [PATCH 06/14] drm/i915: Pass computed vco to bxt_set_cdclk() ville.syrjala
2016-12-22 13:22 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 07/14] drm/i915: Start moving the cdclk stuff into a distinct state structure ville.syrjala
2016-12-22 14:14 ` Ander Conselvan De Oliveira
2016-12-22 14:33 ` Ville Syrjälä
2016-12-23 9:09 ` Ander Conselvan De Oliveira
2016-12-23 12:27 ` Ville Syrjälä
2016-12-23 13:07 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 08/14] drm/i915: Track full cdclk state for the logical and actual cdclk frequencies ville.syrjala
2016-12-23 11:53 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 09/14] drm/i915: Pass dev_priv to remainder of the cdclk functions ville.syrjala
2016-12-23 12:01 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH v2 10/14] drm/i915: Pass the cdclk state to the set_cdclk() functions ville.syrjala
2016-12-23 13:43 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 11/14] drm/i915: Move PFI credit reprogramming into vlv/chv_set_cdclk() ville.syrjala
2016-12-23 13:49 ` Ander Conselvan De Oliveira
2016-12-23 14:07 ` Ville Syrjälä
2016-12-19 17:28 ` [PATCH 12/14] drm/i915: Nuke the VLV/CHV PFI programming power domain workaround ville.syrjala
2016-12-23 13:52 ` Ander Conselvan De Oliveira [this message]
2016-12-19 17:28 ` [PATCH v2 13/14] drm/i915: Replace the .modeset_commit_cdclk() hook with a more direct .set_cdclk() hook ville.syrjala
2016-12-23 14:03 ` Ander Conselvan De Oliveira
2016-12-19 17:28 ` [PATCH 14/14] drm/i915: Move ilk_pipe_pixel_rate() to intel_display.c ville.syrjala
2016-12-23 14:06 ` Ander Conselvan De Oliveira
2016-12-19 18:15 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce intel_cdclk_state (rev2) Patchwork
-- strict thread matches above, loose matches on Subject: below --
2016-12-19 12:34 [PATCH 00/14] drm/i915: Introduce intel_cdclk_state ville.syrjala
2016-12-19 12:34 ` [PATCH 12/14] drm/i915: Nuke the VLV/CHV PFI programming power domain workaround ville.syrjala
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