From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andy Shevchenko Subject: Re: [PATCH v2 4/5] i2c: designware-baytrail: Force the CPU to C1 state while holding the punit semaphore Date: Mon, 02 Jan 2017 10:26:34 +0200 Message-ID: <1483345594.9552.179.camel@linux.intel.com> References: <20161210141908.16470-1-hdegoede@redhat.com> <20161210141908.16470-4-hdegoede@redhat.com> <1481381595.7188.6.camel@linux.intel.com> <5425712f-550e-cc30-3b52-5bd25eabc5d9@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: Sender: linux-i2c-owner@vger.kernel.org To: Hans de Goede , Len Brown , jani.nikula@linux.intel.com Cc: Jarkko Nikula , Wolfram Sang , Mika Westerberg , Takashi Iwai , "russianneuromancer @ ya . ru" , Vincent Gerris , linux-i2c@vger.kernel.org, tagore.chandan@gmail.com, intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sat, 2016-12-31 at 22:29 +0100, Hans de Goede wrote: > This makes sense, the iosf_mbi code which is used by the > i2c bus semaphore code has this: > > arch/x86/platform/intel/iosf_mbi.c: > > int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) > { >          u32 mcr, mcrx; >          unsigned long flags; >          int ret; > >          /* Access to the GFX unit is handled by GPU code */ >          if (port == BT_MBI_UNIT_GFX) { >                  WARN_ON(1); >                  return -EPERM; >          } > > ... > } > > So the i915 driver definitely is interacting with the punit > through the mailbox interface too... Yes, they have private mailbox support. Once I talked to Ville to make at least definitions common between two: iosf_mbi.h and whatever i915 is using, but have no time to implement that. -- Andy Shevchenko Intel Finland Oy