From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/10] drm/i915: Store required fence size/alignment for GGTT vma
Date: Mon, 09 Jan 2017 16:05:01 +0200 [thread overview]
Message-ID: <1483970701.4882.39.camel@linux.intel.com> (raw)
In-Reply-To: <20170106152551.15422-9-chris@chris-wilson.co.uk>
On pe, 2017-01-06 at 15:25 +0000, Chris Wilson wrote:
Commit message missing.
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
<SNIP>
> @@ -3360,11 +3360,10 @@ int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj,
> int i915_gem_open(struct drm_device *dev, struct drm_file *file);
> void i915_gem_release(struct drm_device *dev, struct drm_file *file);
>
> -u64 i915_gem_get_ggtt_size(struct drm_i915_private *dev_priv, u64 size,
> +u32 i915_gem_get_ggtt_size(struct drm_i915_private *dev_priv, u32 size,
We still seem to have some type bouncing going on.
> @@ -3577,7 +3573,7 @@ i915_gem_object_unpin_from_display_plane(struct i915_vma *vma)
> return;
>
> if (--vma->obj->pin_display == 0)
> - vma->display_alignment = 0;
> + vma->display_alignment = 4096;
Is there a case when the max() become zero? Do we have Bugzilla or is
this just preventive action.
> @@ -277,10 +273,18 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
> mutex_unlock(&obj->mm.lock);
>
> list_for_each_entry(vma, &obj->vma_list, obj_link) {
> - if (!vma->fence)
> - continue;
> -
> - vma->fence->dirty = true;
> + if (!i915_vma_is_ggtt(vma))
> + break;
> +
> + vma->fence_size = i915_gem_get_ggtt_size(dev_priv, vma->size,
> + args->tiling_mode,
> + args->stride);
It was called fence_size previously in the context which helped to
understand the variable name. I think without the context, it should
either be vma->ggtt_size or rename i915_gem_get_ggtt_size to fence_size
too.
> @@ -91,6 +91,7 @@ __i915_vma_create(struct drm_i915_gem_object *obj,
> vma->vm = vm;
> vma->obj = obj;
> vma->size = obj->base.size;
> + vma->display_alignment = 4096;
Same question as above. But regardless;
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2017-01-09 14:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-06 15:25 [PATCH 01/10] drm/i915: Pack the partial view size and offset into a single u64 Chris Wilson
2017-01-06 15:25 ` [PATCH 02/10] drm/i915: Convert i915_ggtt_view to use an anonymous union Chris Wilson
2017-01-06 15:43 ` Tvrtko Ursulin
2017-01-06 15:25 ` [PATCH 03/10] drm/i915: Eliminate superfluous i915_ggtt_view_rotated Chris Wilson
2017-01-06 15:25 ` [PATCH 04/10] drm/i915: Eliminate superfluous i915_ggtt_view_normal Chris Wilson
2017-01-06 15:25 ` [PATCH 05/10] drm/i915: Extact compute_partial_view() Chris Wilson
2017-01-09 11:39 ` Joonas Lahtinen
2017-01-06 15:25 ` [PATCH 06/10] drm/i915: Clip the partial view against the object not vma Chris Wilson
2017-01-09 14:08 ` Joonas Lahtinen
2017-01-06 15:25 ` [PATCH 07/10] drm/i915: Align GGTT sizes to a fence tile row Chris Wilson
2017-01-09 13:21 ` Joonas Lahtinen
2017-01-09 13:30 ` Chris Wilson
2017-01-06 15:25 ` [PATCH 08/10] drm/i915: Replace WARNs in fence register writes with extensive asserts Chris Wilson
2017-01-09 13:37 ` Joonas Lahtinen
2017-01-06 15:25 ` [PATCH 09/10] drm/i915: Store required fence size/alignment for GGTT vma Chris Wilson
2017-01-09 14:05 ` Joonas Lahtinen [this message]
2017-01-09 14:14 ` Chris Wilson
2017-01-06 15:25 ` [PATCH 10/10] drm/i915: Remove the rounding down of the gen4+ fence region Chris Wilson
2017-01-09 11:46 ` Joonas Lahtinen
2017-01-09 12:09 ` Chris Wilson
2017-01-09 14:13 ` [PATCH 01/10] drm/i915: Pack the partial view size and offset into a single u64 Joonas Lahtinen
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