* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
@ 2017-01-13 17:07 Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-13 17:07 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
Add debugfs entry for HuC loading status check.
v2: rebased on top of drm-tip.
Cc: Michal wajdeczko <michal.wajdeczko@intel.com>
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 19fe38e..d99c406 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2325,6 +2325,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4553,6 +4583,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 0/8] HuC Loading Patches
@ 2017-01-14 1:17 Anusha Srivatsa
2017-01-14 1:17 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-14 1:17 UTC (permalink / raw)
To: intel-gfx
The patches add HuC loading support. The driver builds a frame level
workload which is stored in the graphics memory. This workload is presented
to HuC for processing. The driver, therefore should first determine if the
HuC is enabled and also read the huC athentication status bit to determine
if HuC was successfully loaded. The GuC is required to authenticate the HuC.
The userspace patches that check for a fully loaded HuC firmware and use it
can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased. Changed the code following the review comments.
v3: rebased. Organize code. Move contents of intel_huc.h to intel_uc.h.
Update function intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch()
to accept dev_priv instead of dev.
v4: rebased. Remove intel_is_huc_valid() since it is called onoly once.
Refactor the code to reduce redundency. Remove fiels like uc_dev which
are no longer used.
v5: rebased. Beautify the code- remove comments that no longer hold
good, add newlines etc.
v6: rebased. Remove further redundency. Correct comments. Replace wait_for
with intel_wait_for_register() for optimisation purpose.Make fw_type an enum.
v7: rebased. Rename intel_huc_loader() to intel_huc(). Move intel_guc_auth_huc()
from intel_uc.c to intel_huc.c. Add return values to DRM_ERRORs.
v8: Use DRM_INFO instead of DRM_ERROR in places that are non-erraneous.
Remove invalidates that are no longer required.
Anusha Srivatsa (8):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 +++-
drivers/gpu/drm/i915/i915_drv.c | 10 +
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_guc_reg.h | 6 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 24 +-
drivers/gpu/drm/i915/intel_guc_loader.c | 196 +++++++++--------
drivers/gpu/drm/i915/intel_huc.c | 342 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 60 +++--
include/uapi/drm/i915_drm.h | 1 +
11 files changed, 569 insertions(+), 120 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc.c
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2017-01-14 1:17 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2017-01-14 1:17 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-14 1:17 UTC (permalink / raw)
To: intel-gfx
Add debugfs entry for HuC loading status check.
v2: rebased on top of drm-tip.
Cc: Michal wajdeczko <michal.wajdeczko@intel.com>
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8ca8423..5829fb4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2352,6 +2352,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4580,6 +4610,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2017-01-13 18:08 Anusha Srivatsa
2017-01-13 18:08 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-13 18:08 UTC (permalink / raw)
To: intel-gfx
The patches add HuC loading support. The driver builds a frame level
workload which is stored in the graphics memory. This workload is presented
to HuC for processing. The driver, therefore should first determine if the
HuC is enabled and also read the huC athentication status bit to determine
if HuC was successfully loaded. The GuC is required to authenticate the HuC.
The userspace patches that check for a fully loaded HuC firmware and use it
can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased. Changed the code following the review comments.
v3: rebased. Organize code. Move contents of intel_huc.h to intel_uc.h.
Update function intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch()
to accept dev_priv instead of dev.
v4: rebased. Remove intel_is_huc_valid() since it is called onoly once.
Refactor the code to reduce redundency. Remove fiels like uc_dev which
are no longer used.
v5: rebased. Beautify the code- remove comments that no longer hold
good, add newlines etc.
v6: rebased. Remove further redundency. Correct comments. Replace wait_for
with intel_wait_for_register() for optimisation purpose.Make fw_type an enum.
v7: rebased. Rename intel_huc_loader() to intel_huc(). Move intel_guc_auth_huc()
from intel_uc.c to intel_huc.c. Add return values to DRM_ERRORs.
v8: Use DRM_INFO instead of DRM_ERROR in places that are non-erraneous.
Remove invalidates that are no longer required.
Anusha Srivatsa (8):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 +++-
drivers/gpu/drm/i915/i915_drv.c | 10 +
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_guc_reg.h | 6 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 24 +-
drivers/gpu/drm/i915/intel_guc_loader.c | 196 +++++++++--------
drivers/gpu/drm/i915/intel_huc.c | 342 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 60 +++--
include/uapi/drm/i915_drm.h | 1 +
11 files changed, 569 insertions(+), 120 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2017-01-13 18:08 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2017-01-13 18:08 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-13 18:08 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
Add debugfs entry for HuC loading status check.
v2: rebased on top of drm-tip.
Cc: Michal wajdeczko <michal.wajdeczko@intel.com>
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8ca8423..5829fb4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2352,6 +2352,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4580,6 +4610,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2017-01-04 14:55 Anusha Srivatsa
2017-01-04 14:55 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-04 14:55 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The driver builds a frame level
workload which is stored in the graphics memory. This workload is presented
to HuC for processing. The driver, therefore should first determine if the
HuC is enabled and also read the huC athentication status bit to determine
if HuC was successfully loaded. The GuC is required to authenticate the HuC.
The userspace patches that check for a fully loaded HuC firmware and use it
can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arek
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
v5: rebased on top of drm-tip. The patch series is now in sync with GuC
code reorganization efforts by Arek-
https://patchwork.freedesktop.org/series/15896/
v6:rebased. Organize code. Move contents of intel_huc.h to intel_uc.h.
Update function intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch()
to accept dev_priv instead of dev.
v7: rebased. Remove intel_is_huc_valid() since it is called onoly once.
Refactor the code to reduce redundency. Remove fiels like uc_dev which
are no longer used.
v8: rebased. Beautify the code- remove comments that no longer hold
good, add newlines etc.
v9: rebased. Remove further redundency. Correct comments. Replace wait_for
with intel_wait_for_register() for optimisation purpose.Make fw_type an enum.
Anusha Srivatsa (3):
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (5):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 ++++-
drivers/gpu/drm/i915/i915_drv.c | 11 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 24 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 200 ++++++++++----------
drivers/gpu/drm/i915/intel_huc_loader.c | 283 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.c | 68 ++++++-
drivers/gpu/drm/i915/intel_uc.h | 64 +++++--
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 579 insertions(+), 126 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2017-01-04 14:55 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2017-01-04 14:55 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-04 14:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
v11: rebased on top of drm-tip
v12: rebased.
v13: rebased.
v14: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 19fe38e..d99c406 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2325,6 +2325,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4553,6 +4583,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2017-01-04 13:27 Anusha Srivatsa
2017-01-04 13:27 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-04 13:27 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The driver builds a frame level
workload which is stored in the graphics memory. This workload is presented
to HuC for processing. The driver, therefore should first determine if the
HuC is enabled and also read the huC athentication status bit to determine
if HuC was successfully loaded. The GuC is required to authenticate the HuC.
The userspace patches that check for a fully loaded HuC firmware and use it
can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arek
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
v5: rebased on top of drm-tip. The patch series is now in sync with GuC
code reorganization efforts by Arek-
https://patchwork.freedesktop.org/series/15896/
v6:rebased. Organize code. Move contents of intel_huc.h to intel_uc.h.
Update function intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch()
to accept dev_priv instead of dev.
v7: rebased. Remove intel_is_huc_valid() since it is called onoly once.
Refactor the code to reduce redundency. Remove fiels like uc_dev which
are no longer used.
v8: rebased. Beautify the code- remove comments that no longer hold
good, add newlines etc.
v9: rebased. Remove further redundency. Correct comments. Replace wait_for
with intel_wait_for_register() for optimisation purpose.Make fw_type an enum.
Anusha Srivatsa (3):
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (5):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 ++++-
drivers/gpu/drm/i915/i915_drv.c | 11 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 24 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 200 ++++++++++----------
drivers/gpu/drm/i915/intel_huc_loader.c | 283 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.c | 68 ++++++-
drivers/gpu/drm/i915/intel_uc.h | 64 +++++--
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 579 insertions(+), 126 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2017-01-04 13:27 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2017-01-04 13:27 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2017-01-04 13:27 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
v11: rebased on top of drm-tip
v12: rebased.
v13: rebased.
v14: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 150536e..517ec94 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2325,6 +2325,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4553,6 +4583,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2016-12-22 23:12 Anusha Srivatsa
2016-12-22 23:12 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2016-12-22 23:12 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The driver builds a frame level
workload which is stored in the graphics memory. This workload is presented
to HuC for processing. The driver, therefore should first determine if the
HuC is enabled and also read the huC athentication status bit to determine
if HuC was successfully loaded. The GuC is required to authenticate the HuC.
The userspace patches that check for a fully loaded HuC firmware and use it
can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arek
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
v5: rebased on top of drm-tip. The patch series is now in sync with GuC
code reorganization efforts by Arek-
https://patchwork.freedesktop.org/series/15896/
v6:rebased. Organize code. Move contents of intel_huc.h to intel_uc.h.
Update function intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch()
to accept dev_priv instead of dev.
v7: rebased. Remove intel_is_huc_valid() since it is called onoly once.
Refactor the code to reduce redundency. Remove fiels like uc_dev which
are no longer used.
v8: rebased. Beautify the code- remove comments that no longer hold
good, add newlines etc.
Anusha Srivatsa (3):
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (5):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 ++++-
drivers/gpu/drm/i915/i915_drv.c | 11 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 24 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 200 +++++++++++---------
drivers/gpu/drm/i915/intel_huc_loader.c | 286 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.c | 62 +++++++
drivers/gpu/drm/i915/intel_uc.h | 63 +++++--
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 577 insertions(+), 124 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2016-12-22 23:12 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2016-12-22 23:12 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2016-12-22 23:12 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
v11: rebased on top of drm-tip
v12: rebased.
v13: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 0a3c575..f43b41e 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2325,6 +2325,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4553,6 +4583,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2016-12-15 22:29 anushasr
2016-12-15 22:29 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check anushasr
0 siblings, 1 reply; 11+ messages in thread
From: anushasr @ 2016-12-15 22:29 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The driver builds a frame level
workload which is stored in the graphics memory. This workload is presented
to HuC for processing. The driver, therefore should first determine if the
HuC is enabled and also read the huC athentication status bit to determine
if HuC was successfully loaded. The GuC is required to authenticate the HuC.
The userspace patches that check for a fully loaded HuC firmware and use it
can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arek
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
v5: rebased on top of drm-tip. The patch series is now in sync with GuC
code reorganization efforts by Arek-
https://patchwork.freedesktop.org/series/15896/
v6:rebased. Organize code. Move contents of intel_huc.h to intel_uc.h.
Update function intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch()
to accept dev_priv instead of dev.
v7: rebased. Remove intel_is_huc_valid() since it is called onoly once.
Refactor the code to reduce redundency. Remove fiels like uc_dev which
are no longer used.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Arek <arkadiusz.hiler@intel.com>
Cc: Jeff Mcgee <jeff.mcgee@intel.com> BLURB HERE ***
Cc: Chris Wilson <Chris@chris-wilson.co.uk>
Anusha Srivatsa (3):
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (5):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 ++++-
drivers/gpu/drm/i915/i915_drv.c | 8 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 24 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 201 +++++++++++---------
drivers/gpu/drm/i915/intel_huc_loader.c | 290 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.c | 62 ++++++
drivers/gpu/drm/i915/intel_uc.h | 63 +++++--
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 579 insertions(+), 124 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2016-12-15 22:29 [PATCH 0/8] HuC Loading Patches anushasr
@ 2016-12-15 22:29 ` anushasr
0 siblings, 0 replies; 11+ messages in thread
From: anushasr @ 2016-12-15 22:29 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
v11: rebased on top of drm-tip
v12: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 008afe6..2cdadbd 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2325,6 +2325,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -4553,6 +4583,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8]HuC Loading Patches
@ 2016-12-08 23:02 anushasr
2016-12-08 23:02 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check anushasr
0 siblings, 1 reply; 11+ messages in thread
From: anushasr @ 2016-12-08 23:02 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The GuC is required to
authenticate the HuC. The userspace patches that check for a
fully loaded HuC firmware and use it can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arek
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
v5: rebased on top of drm-tip. The patch series is now in sync with GuC
code reorganization efforts by Arek-
https://patchwork.freedesktop.org/series/15896/
v6: rebased. Organize the code-move contents of intel_huc.h to intel_uc.h. Update functions
intel_huc_load(),intel_huc_init() and intel_uc_fw_fetch() to accept dev_priv instead of dev.
Anusha Srivatsa (3):
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (5):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 +++-
drivers/gpu/drm/i915/i915_drv.c | 8 +-
drivers/gpu/drm/i915/i915_drv.h | 3 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 4 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 22 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 199 ++++++++++---------
drivers/gpu/drm/i915/intel_huc_loader.c | 303 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.c | 61 ++++++
drivers/gpu/drm/i915/intel_uc.h | 68 +++++--
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 593 insertions(+), 123 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2016-12-08 23:02 [PATCH 0/8]HuC Loading Patches anushasr
@ 2016-12-08 23:02 ` anushasr
0 siblings, 0 replies; 11+ messages in thread
From: anushasr @ 2016-12-08 23:02 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
v11: rebased on top of drm-tip
v12: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 0e5ef62..639b66d 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2335,6 +2335,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.huc_fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -5403,6 +5433,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2016-11-30 23:31 Anusha Srivatsa
2016-11-30 23:31 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2016-11-30 23:31 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The GuC is required to
authenticate the HuC. The userspace patches that check for a
fully loaded HuC firmware and use it can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
More information regarding the HuC, batch commands that configure the
HuC etc can be found at-
https://01.org/sites/default/files/documentation/intel-gfx-prm-osrc-skl-vol02a-commandreference-instructions-huc.pdf
https://www.x.org/docs/intel/CHV/intel-gfx-prm-osrc-chv-bsw-vol10-hevc.pdf
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arek
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
v5: rebased on top of drm-tip. The patch series is now in sync with GuC
code reorganization efforts by Arek-
https://patchwork.freedesktop.org/series/15896/
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Arek <arkadiusz.hiler@intel.com>
Cc: Jeff Mcgee <jeff.mcgee@intel.com>
Anusha Srivatsa (2):
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (6):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i914/huc: Add HuC fw loading support
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 +++-
drivers/gpu/drm/i915/i915_drv.c | 9 +-
drivers/gpu/drm/i915/i915_drv.h | 4 +-
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 67 ++++++-
drivers/gpu/drm/i915/intel_guc_fwif.h | 22 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 196 +++++++++---------
drivers/gpu/drm/i915/intel_huc.h | 43 ++++
drivers/gpu/drm/i915/intel_huc_loader.c | 306 +++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 47 +++--
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 620 insertions(+), 122 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc.h
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2016-11-30 23:31 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2016-11-30 23:31 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2016-11-30 23:31 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
v11: rebased on top of drm-tip
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index d6efda9..1cc4682 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2334,6 +2334,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.huc_fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -5402,6 +5432,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH 0/8] HuC Loading Patches
@ 2016-11-23 22:27 Anusha Srivatsa
2016-11-23 22:27 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2016-11-23 22:27 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The userspace
patches that check for a fully loaded HuC firmware and use
it can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
v2: rebased.
v3: rebased. Changed the code following the review comments.
v4: Added action_lock initialization fix provided by Arick
(Hiler Arkadiusz) to the first patch in the series- Make the
GuC fw loading helper functions general.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Anusha Srivatsa (2):
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (6):
drm/i915/guc: Make the GuC fw loading helper functions general. Always
initialize action_lock
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 +++-
drivers/gpu/drm/i915/i915_drv.c | 8 +
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 70 ++++++-
drivers/gpu/drm/i915/intel_guc.h | 49 +++--
drivers/gpu/drm/i915/intel_guc_fwif.h | 22 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 196 +++++++++---------
drivers/gpu/drm/i915/intel_huc.h | 43 ++++
drivers/gpu/drm/i915/intel_huc_loader.c | 306 +++++++++++++++++++++++++++++
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 624 insertions(+), 121 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc.h
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2016-11-23 22:27 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
@ 2016-11-23 22:27 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2016-11-23 22:27 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
v10: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 53305a4..97324e1 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2355,6 +2355,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.huc_fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -5416,6 +5446,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
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^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v4 0/8] HuC Loading Patches
@ 2016-11-11 0:15 Anusha Srivatsa
2016-11-11 0:15 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
0 siblings, 1 reply; 11+ messages in thread
From: Anusha Srivatsa @ 2016-11-11 0:15 UTC (permalink / raw)
To: intel-gfx
These patches add HuC loading support. The userspace
patches that check for a fully loaded HuC firmware and use
it can be found at:
https://lists.freedesktop.org/archives/libva/2016-September/004554.html
https://lists.freedesktop.org/archives/libva/2016-September/004555.html
v2: rebased.
v3: rebased. Changed the code following the review comments.
Changed mainly include renaming certain functions, correcting comments
and changing the yesr in the copyright message. Removed one patch
from original series: Add guC status to getparams.
v4: Added the file construction method which the HuC follows. This is on similar
lines to that of GuC. Rewrote the BXT HuC loading patch and wrote a new
patch for HuC loading on KBL.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Anusha Srivatsa (2):
drm/i915/huc: Add BXT HuC Loading Support
drm/i915/HuC: Add KBL huC loading Support
Peter Antoine (6):
drm/i915/guc: Make the GuC fw loading helper functions general
drm/i915/huc: Unified css_header struct for GuC and HuC
drm/i915/huc: Add HuC fw loading support
drm/i915/huc: Add debugfs for HuC loading status check
drm/i915/huc: Support HuC authentication
drm/i915/get_params: Add HuC status to getparams
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 43 +++-
drivers/gpu/drm/i915/i915_drv.c | 8 +
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/i915_guc_reg.h | 3 +
drivers/gpu/drm/i915/i915_guc_submission.c | 67 ++++++-
drivers/gpu/drm/i915/intel_guc.h | 50 +++--
drivers/gpu/drm/i915/intel_guc_fwif.h | 22 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 197 +++++++++---------
drivers/gpu/drm/i915/intel_huc.h | 43 ++++
drivers/gpu/drm/i915/intel_huc_loader.c | 308 +++++++++++++++++++++++++++++
include/uapi/drm/i915_drm.h | 1 +
12 files changed, 624 insertions(+), 122 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_huc.h
create mode 100644 drivers/gpu/drm/i915/intel_huc_loader.c
--
2.7.4
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^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check
2016-11-11 0:15 [PATCH v4 0/8] HuC Loading Patches Anusha Srivatsa
@ 2016-11-11 0:15 ` Anusha Srivatsa
0 siblings, 0 replies; 11+ messages in thread
From: Anusha Srivatsa @ 2016-11-11 0:15 UTC (permalink / raw)
To: intel-gfx; +Cc: Alex Dai, Peter Antoine
From: Peter Antoine <peter.antoine@intel.com>
Add debugfs entry for HuC loading status check.
v2: rebase on-top of drm-intel-nightly.
v3: rebased again.
v7: rebased.
v8: rebased.
v9: rebased.
Tested-by: Xiang Haihao <haihao.xiang@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Alex Dai <yu.dai@intel.com>
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
Reviewed-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Jeff McGee <jeff.mcgee@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 7e206dd..83967a0 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2350,6 +2350,36 @@ static int i915_llc(struct seq_file *m, void *data)
return 0;
}
+static int i915_huc_load_status_info(struct seq_file *m, void *data)
+{
+ struct drm_i915_private *dev_priv = node_to_i915(m->private);
+ struct intel_uc_fw *huc_fw = &dev_priv->huc.huc_fw;
+
+ if (!HAS_HUC_UCODE(dev_priv))
+ return 0;
+
+ seq_puts(m, "HuC firmware status:\n");
+ seq_printf(m, "\tpath: %s\n", huc_fw->uc_fw_path);
+ seq_printf(m, "\tfetch: %s\n",
+ intel_uc_fw_status_repr(huc_fw->fetch_status));
+ seq_printf(m, "\tload: %s\n",
+ intel_uc_fw_status_repr(huc_fw->load_status));
+ seq_printf(m, "\tversion wanted: %d.%d\n",
+ huc_fw->major_ver_wanted, huc_fw->minor_ver_wanted);
+ seq_printf(m, "\tversion found: %d.%d\n",
+ huc_fw->major_ver_found, huc_fw->minor_ver_found);
+ seq_printf(m, "\theader: offset is %d; size = %d\n",
+ huc_fw->header_offset, huc_fw->header_size);
+ seq_printf(m, "\tuCode: offset is %d; size = %d\n",
+ huc_fw->ucode_offset, huc_fw->ucode_size);
+ seq_printf(m, "\tRSA: offset is %d; size = %d\n",
+ huc_fw->rsa_offset, huc_fw->rsa_size);
+
+ seq_printf(m, "\nHuC status 0x%08x:\n", I915_READ(HUC_STATUS2));
+
+ return 0;
+}
+
static int i915_guc_load_status_info(struct seq_file *m, void *data)
{
struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -5411,6 +5441,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
{"i915_guc_info", i915_guc_info, 0},
{"i915_guc_load_status", i915_guc_load_status_info, 0},
{"i915_guc_log_dump", i915_guc_log_dump, 0},
+ {"i915_huc_load_status", i915_huc_load_status_info, 0},
{"i915_frequency_info", i915_frequency_info, 0},
{"i915_hangcheck_info", i915_hangcheck_info, 0},
{"i915_drpc_info", i915_drpc_info, 0},
--
2.7.4
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^ permalink raw reply related [flat|nested] 11+ messages in thread
end of thread, other threads:[~2017-01-14 1:20 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
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2017-01-13 17:07 [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
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2017-01-14 1:17 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2017-01-14 1:17 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2017-01-13 18:08 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2017-01-13 18:08 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2017-01-04 14:55 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2017-01-04 14:55 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2017-01-04 13:27 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2017-01-04 13:27 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2016-12-22 23:12 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2016-12-22 23:12 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2016-12-15 22:29 [PATCH 0/8] HuC Loading Patches anushasr
2016-12-15 22:29 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check anushasr
2016-12-08 23:02 [PATCH 0/8]HuC Loading Patches anushasr
2016-12-08 23:02 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check anushasr
2016-11-30 23:31 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2016-11-30 23:31 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2016-11-23 22:27 [PATCH 0/8] HuC Loading Patches Anusha Srivatsa
2016-11-23 22:27 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
2016-11-11 0:15 [PATCH v4 0/8] HuC Loading Patches Anusha Srivatsa
2016-11-11 0:15 ` [PATCH 6/8] drm/i915/huc: Add debugfs for HuC loading status check Anusha Srivatsa
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