intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
* [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.
@ 2017-01-19 18:39 Rodrigo Vivi
  2017-01-19 18:39 ` [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK Rodrigo Vivi
                   ` (2 more replies)
  0 siblings, 3 replies; 6+ messages in thread
From: Rodrigo Vivi @ 2017-01-19 18:39 UTC (permalink / raw)
  To: intel-gfx; +Cc: Mika Kuoppala, Tim Gore, Rodrigo Vivi

According to wa_database this Wa persist on KBL as it was on SKL.

Cc: Tim Gore <tim.gore@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e808aad..cc0bb7b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2184,12 +2184,12 @@ static void gtt_write_workarounds(struct drm_i915_private *dev_priv)
 	 * called on driver load and after a GPU reset, so you can place
 	 * workarounds here even if they get overwritten by GPU reset.
 	 */
-	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt */
+	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl */
 	if (IS_BROADWELL(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
 	else if (IS_CHERRYVIEW(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
-	else if (IS_SKYLAKE(dev_priv))
+	else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
 	else if (IS_BROXTON(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK.
  2017-01-19 18:39 [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Rodrigo Vivi
@ 2017-01-19 18:39 ` Rodrigo Vivi
  2017-01-20  9:32   ` Ander Conselvan De Oliveira
  2017-01-19 19:24 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Patchwork
  2017-01-23  7:17 ` [PATCH 1/2] " Ander Conselvan De Oliveira
  2 siblings, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2017-01-19 18:39 UTC (permalink / raw)
  To: intel-gfx
  Cc: Ander Conselvan de Oliveira, Mika Kuoppala, Tim Gore,
	Rodrigo Vivi

According to wa_database this Wa persist on GLK as it was on BXT.

Cc: Tim Gore <tim.gore@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index cc0bb7b..332ca28 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2184,14 +2184,14 @@ static void gtt_write_workarounds(struct drm_i915_private *dev_priv)
 	 * called on driver load and after a GPU reset, so you can place
 	 * workarounds here even if they get overwritten by GPU reset.
 	 */
-	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl */
+	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl,glk */
 	if (IS_BROADWELL(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
 	else if (IS_CHERRYVIEW(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
 	else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
-	else if (IS_BROXTON(dev_priv))
+	else if (IS_GEN9_LP(dev_priv))
 		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
 }
 
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.
  2017-01-19 18:39 [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Rodrigo Vivi
  2017-01-19 18:39 ` [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK Rodrigo Vivi
@ 2017-01-19 19:24 ` Patchwork
  2017-01-23  7:17 ` [PATCH 1/2] " Ander Conselvan De Oliveira
  2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-01-19 19:24 UTC (permalink / raw)
  To: Rodrigo Vivi; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.
URL   : https://patchwork.freedesktop.org/series/18240/
State : success

== Summary ==

Series 18240v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/18240/revisions/1/mbox/

Test gem_busy:
        Subgroup basic-hang-default:
                fail       -> PASS       (fi-ivb-3520m)

fi-bdw-5557u     total:246  pass:232  dwarn:0   dfail:0   fail:0   skip:14 
fi-bsw-n3050     total:246  pass:207  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:246  pass:224  dwarn:0   dfail:0   fail:0   skip:22 
fi-bxt-t5700     total:79   pass:66   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:246  pass:219  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:246  pass:215  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:246  pass:227  dwarn:0   dfail:0   fail:0   skip:19 
fi-hsw-4770r     total:246  pass:227  dwarn:0   dfail:0   fail:0   skip:19 
fi-ivb-3520m     total:246  pass:225  dwarn:0   dfail:0   fail:0   skip:21 
fi-ivb-3770      total:246  pass:225  dwarn:0   dfail:0   fail:0   skip:21 
fi-kbl-7500u     total:246  pass:225  dwarn:0   dfail:0   fail:0   skip:21 
fi-skl-6260u     total:246  pass:233  dwarn:0   dfail:0   fail:0   skip:13 
fi-skl-6700hq    total:246  pass:226  dwarn:0   dfail:0   fail:0   skip:20 
fi-skl-6700k     total:246  pass:222  dwarn:3   dfail:0   fail:0   skip:21 
fi-skl-6770hq    total:246  pass:233  dwarn:0   dfail:0   fail:0   skip:13 
fi-snb-2520m     total:246  pass:215  dwarn:0   dfail:0   fail:0   skip:31 
fi-snb-2600      total:246  pass:214  dwarn:0   dfail:0   fail:0   skip:32 

6155f94d32e438a9656de680897060bd2245629a drm-tip: 2017y-01m-19d-18h-24m-49s UTC integration manifest
760dbc9 drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK.
30e8d11 drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3549/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK.
  2017-01-19 18:39 ` [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK Rodrigo Vivi
@ 2017-01-20  9:32   ` Ander Conselvan De Oliveira
  2017-01-20 15:58     ` Rodrigo Vivi
  0 siblings, 1 reply; 6+ messages in thread
From: Ander Conselvan De Oliveira @ 2017-01-20  9:32 UTC (permalink / raw)
  To: Rodrigo Vivi, intel-gfx; +Cc: Tim Gore, Mika Kuoppala

On Thu, 2017-01-19 at 10:39 -0800, Rodrigo Vivi wrote:
> According to wa_database this Wa persist on GLK as it was on BXT.
> 
> Cc: Tim Gore <tim.gore@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index cc0bb7b..332ca28 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2184,14 +2184,14 @@ static void gtt_write_workarounds(struct drm_i915_private *dev_priv)
>  	 * called on driver load and after a GPU reset, so you can place
>  	 * workarounds here even if they get overwritten by GPU reset.
>  	 */
> -	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl */
> +	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl,glk */
>  	if (IS_BROADWELL(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
>  	else if (IS_CHERRYVIEW(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
>  	else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
> -	else if (IS_BROXTON(dev_priv))
> +	else if (IS_GEN9_LP(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
>  }
>  

I wrote the same change in

https://patchwork.freedesktop.org/patch/132807/


Ander
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK.
  2017-01-20  9:32   ` Ander Conselvan De Oliveira
@ 2017-01-20 15:58     ` Rodrigo Vivi
  0 siblings, 0 replies; 6+ messages in thread
From: Rodrigo Vivi @ 2017-01-20 15:58 UTC (permalink / raw)
  To: Ander Conselvan De Oliveira
  Cc: intel-gfx, Mika Kuoppala, Tim Gore, Rodrigo Vivi

On Fri, Jan 20, 2017 at 1:32 AM, Ander Conselvan De Oliveira
<conselvan2@gmail.com> wrote:
> On Thu, 2017-01-19 at 10:39 -0800, Rodrigo Vivi wrote:
>> According to wa_database this Wa persist on GLK as it was on BXT.
>>
>> Cc: Tim Gore <tim.gore@intel.com>
>> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
>> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> ---
>>  drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index cc0bb7b..332ca28 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -2184,14 +2184,14 @@ static void gtt_write_workarounds(struct drm_i915_private *dev_priv)
>>        * called on driver load and after a GPU reset, so you can place
>>        * workarounds here even if they get overwritten by GPU reset.
>>        */
>> -     /* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl */
>> +     /* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl,glk */
>>       if (IS_BROADWELL(dev_priv))
>>               I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
>>       else if (IS_CHERRYVIEW(dev_priv))
>>               I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
>>       else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
>>               I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
>> -     else if (IS_BROXTON(dev_priv))
>> +     else if (IS_GEN9_LP(dev_priv))
>>               I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
>>  }
>>
>
> I wrote the same change in
>
> https://patchwork.freedesktop.org/patch/132807/

So please ignore this patch here.
I'm going to review yours.

Since you know what this is about, could you please review the KBL one?
https://patchwork.freedesktop.org/patch/134072/


>
>
> Ander
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL.
  2017-01-19 18:39 [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Rodrigo Vivi
  2017-01-19 18:39 ` [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK Rodrigo Vivi
  2017-01-19 19:24 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Patchwork
@ 2017-01-23  7:17 ` Ander Conselvan De Oliveira
  2 siblings, 0 replies; 6+ messages in thread
From: Ander Conselvan De Oliveira @ 2017-01-23  7:17 UTC (permalink / raw)
  To: Rodrigo Vivi, intel-gfx; +Cc: Tim Gore, Mika Kuoppala

On Thu, 2017-01-19 at 10:39 -0800, Rodrigo Vivi wrote:
> According to wa_database this Wa persist on KBL as it was on SKL.
> 
> Cc: Tim Gore <tim.gore@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>

> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index e808aad..cc0bb7b 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2184,12 +2184,12 @@ static void gtt_write_workarounds(struct
> drm_i915_private *dev_priv)
>  	 * called on driver load and after a GPU reset, so you can place
>  	 * workarounds here even if they get overwritten by GPU reset.
>  	 */
> -	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt */
> +	/* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt,kbl */
>  	if (IS_BROADWELL(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU,
> GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
>  	else if (IS_CHERRYVIEW(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU,
> GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
> -	else if (IS_SKYLAKE(dev_priv))
> +	else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU,
> GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
>  	else if (IS_BROXTON(dev_priv))
>  		I915_WRITE(GEN8_L3_LRA_1_GPGPU,
> GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2017-01-23  7:17 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-01-19 18:39 [PATCH 1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Rodrigo Vivi
2017-01-19 18:39 ` [PATCH 2/2] drm/i915/glk: Apply WaIncreaseDefaultTLBEntries on GLK Rodrigo Vivi
2017-01-20  9:32   ` Ander Conselvan De Oliveira
2017-01-20 15:58     ` Rodrigo Vivi
2017-01-19 19:24 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/kbl: Apply WaIncreaseDefaultTLBEntries on KBL Patchwork
2017-01-23  7:17 ` [PATCH 1/2] " Ander Conselvan De Oliveira

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).