From: Shashank Sharma <shashank.sharma@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
ville.syrjala@linux.intel.com
Cc: jose.abreu@synopsys.com, =daniel.vetter@intel.com,
thierry.reding@gmail.com
Subject: [PATCH 5/6] drm/i915: enable scrambling
Date: Wed, 1 Feb 2017 18:14:40 +0530 [thread overview]
Message-ID: <1485953081-7630-6-git-send-email-shashank.sharma@intel.com> (raw)
In-Reply-To: <1485953081-7630-1-git-send-email-shashank.sharma@intel.com>
Geminilake platform has a native HDMI 2.0 controller, and is
capable of driving pixel-clocks upto 594Mhz. HDMI 2.0 spec
mendates scrambling for these higher clocks, for reduced RF footprint.
This patch checks if the monitor supports scrambling, and if required,
enables it during the modeset.
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 ++
drivers/gpu/drm/i915/intel_ddi.c | 5 +++++
drivers/gpu/drm/i915/intel_drv.h | 2 ++
drivers/gpu/drm/i915/intel_hdmi.c | 42 +++++++++++++++++++++++++++++++++++++++
4 files changed, 51 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 495b789..cc85892 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7807,6 +7807,8 @@ enum {
#define TRANS_DDI_EDP_INPUT_C_ONOFF (6<<12)
#define TRANS_DDI_DP_VC_PAYLOAD_ALLOC (1<<8)
#define TRANS_DDI_BFI_ENABLE (1<<4)
+#define TRANS_DDI_HIGH_TMDS_CHAR_RATE (1<<4)
+#define TRANS_DDI_HDMI_SCRAMBLING (1<<0)
/* DisplayPort Transport Control */
#define _DP_TP_CTL_A 0x64040
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 9a9a670..aea81ce 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1278,6 +1278,11 @@ void intel_ddi_enable_transcoder_func(struct drm_crtc *crtc)
temp |= TRANS_DDI_MODE_SELECT_HDMI;
else
temp |= TRANS_DDI_MODE_SELECT_DVI;
+
+ if (IS_GEMINILAKE(dev_priv)) {
+ temp |= intel_hdmi_check_scrambling(intel_encoder,
+ &intel_crtc->config->base.adjusted_mode);
+ }
} else if (type == INTEL_OUTPUT_ANALOG) {
temp |= TRANS_DDI_MODE_SELECT_FDI;
temp |= (intel_crtc->config->fdi_lanes - 1) << 1;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 393f243..aafce7f 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1588,6 +1588,8 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
bool intel_hdmi_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state);
+uint32_t intel_hdmi_check_scrambling(struct intel_encoder *intel_encoder,
+ struct drm_display_mode *mode);
void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index ebae2bd..92dd9bc 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1795,6 +1795,48 @@ static void intel_hdmi_destroy(struct drm_connector *connector)
intel_hdmi->aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
}
+static void
+intel_hdmi_enable_scrambling(struct drm_connector *connector)
+{
+ struct drm_i915_private *dev_priv = connector->dev->dev_private;
+ struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector);
+ struct i2c_adapter *adapter =
+ intel_gmbus_get_adapter(dev_priv, intel_hdmi->ddc_bus);
+
+ if (!drm_enable_scrambling(connector, adapter, true))
+ DRM_ERROR("Request to enable scrambling failed\n");
+}
+
+uint32_t intel_hdmi_check_scrambling(struct intel_encoder *intel_encoder,
+ struct drm_display_mode *mode)
+{
+ struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&intel_encoder->base);
+ struct drm_connector *connector = &intel_hdmi->attached_connector->base;
+ struct drm_hdmi_info *hdmi_info = &connector->display_info.hdmi_info;
+ uint32_t hdmi_config = 0;
+
+ DRM_DEBUG_KMS("Checking scrambling for enc:%s connector:%s\n",
+ intel_encoder->base.name, connector->name);
+
+ if (mode->clock < 340000) {
+ if (hdmi_info->scr_info.low_clocks) {
+ intel_hdmi_enable_scrambling(connector);
+ hdmi_config |= TRANS_DDI_HDMI_SCRAMBLING;
+ }
+ return hdmi_config;
+ }
+
+ /* Enable scrambling for clocks > 340M */
+ if (hdmi_info->scr_info.supported) {
+ intel_hdmi_enable_scrambling(connector);
+ hdmi_config |= TRANS_DDI_HDMI_SCRAMBLING;
+ }
+
+ /* Scrambling or not, if clock > 340M, set high char rate */
+ hdmi_config |= TRANS_DDI_HIGH_TMDS_CHAR_RATE;
+ return hdmi_config;
+}
+
static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
enum port port)
{
--
1.9.1
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next prev parent reply other threads:[~2017-02-01 12:44 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-01 12:44 [PATCH 0/6] HDMI 2.0: Scrambling support in DRM layer Shashank Sharma
2017-02-01 12:44 ` [PATCH 1/6] drm: Add SCDC helpers Shashank Sharma
2017-02-02 11:25 ` Jani Nikula
2017-02-02 11:47 ` Sharma, Shashank
2017-02-01 12:44 ` [PATCH 2/6] drm/edid: check for HF-VSDB block Shashank Sharma
2017-02-01 12:44 ` [PATCH 3/6] drm/edid: detect SCDC support in HF-VSDB Shashank Sharma
2017-02-01 16:10 ` Thierry Reding
2017-02-02 5:28 ` Sharma, Shashank
2017-02-02 18:02 ` Thierry Reding
2017-02-01 16:33 ` Ville Syrjälä
2017-02-02 5:40 ` Sharma, Shashank
2017-02-01 12:44 ` [PATCH 4/6] drm: scrambling support in drm layer Shashank Sharma
2017-02-01 16:32 ` Thierry Reding
2017-02-02 5:38 ` Sharma, Shashank
2017-02-02 18:13 ` Thierry Reding
2017-02-03 4:03 ` Sharma, Shashank
2017-02-01 16:32 ` Ville Syrjälä
2017-02-02 5:48 ` Sharma, Shashank
2017-02-02 9:51 ` Ville Syrjälä
2017-02-02 10:16 ` Sharma, Shashank
2017-02-02 10:28 ` Ville Syrjälä
2017-02-02 10:35 ` Sharma, Shashank
2017-02-01 19:53 ` Pandiyan, Dhinakaran
2017-02-02 5:55 ` [Intel-gfx] " Sharma, Shashank
2017-02-01 12:44 ` Shashank Sharma [this message]
2017-02-01 16:36 ` [PATCH 5/6] drm/i915: enable scrambling Ville Syrjälä
2017-02-02 5:53 ` Sharma, Shashank
2017-02-02 10:02 ` Ville Syrjälä
2017-02-02 10:45 ` Sharma, Shashank
2017-02-02 12:27 ` Ville Syrjälä
2017-02-01 12:44 ` [PATCH 6/6] drm/i915: allow HDMI 2.0 clock rates Shashank Sharma
2017-02-01 13:02 ` ✗ Fi.CI.BAT: failure for HDMI 2.0: Scrambling support in DRM layer Patchwork
2017-02-01 13:07 ` Sharma, Shashank
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