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From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>,
	intel-gfx@lists.freedesktop.org
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Subject: Re: [PATCH v2 2/2] drm/i915: Implement cdclk restrictions based on Azalia BCLK
Date: Tue, 14 Mar 2017 17:47:12 -0300	[thread overview]
Message-ID: <1489524432.2442.64.camel@intel.com> (raw)
In-Reply-To: <1488931972-2865-2-git-send-email-dhinakaran.pandiyan@intel.com>

Em Ter, 2017-03-07 às 16:12 -0800, Dhinakaran Pandiyan escreveu:
> According to BSpec, "The CD clock frequency must be at least twice
> the
> frequency of the Azalia BCLK." and BCLK is configured to 96 MHz by
> default. This check is needed because BXT and GLK support cdclk
> frequencies less than 192 MHz.
> 
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_cdclk.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> b/drivers/gpu/drm/i915/intel_cdclk.c
> index e8c1181..7b1ac1d 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -1458,6 +1458,18 @@ static int
> bdw_adjust_min_pipe_pixel_rate(struct intel_crtc_state *crtc_state,
>  			pixel_rate = max(432000, pixel_rate);
>  	}
>  
> +	/* According to BSpec, "The CD clock frequency must be at
> least twice
> +	 * the frequency of the Azalia BCLK." and BCLK is 96 MHz by
> default.
> +	 * The check for GLK has to be adjusted as the platform can
> output
> +	 * two pixels per clock.
> +	 */
> +	if (crtc_state->has_audio) {
> +		if (IS_GEMINILAKE(dev_priv))
> +			pixel_rate = max(2 * 2 * 96000, pixel_rate);
> +		if (IS_BROXTON(dev_priv))

SKL also documents this in the page that explains the cdclk freq change
sequences. The funny thing is that the minimum CDCLK for SKL seems to
be 308.57, so that's still bigger than 96*2... Anyway, having this for
completeness would probably be good, just in case I'm missing some
detail that's important here.

I'd like to see the SKL addition, but I can live without it in case you
have some better argument, so if you don't send a new version, here's
it:

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>


Perhaps it would also be interesting to have some sort of macro to
identify the platform(s) that need the magic *2 calculation. A more
confusion-proof version of this function would look like this:

if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
	if (HAS_2_PIXELS_PER_CLOCK(dev_priv))
		pixel_rate = max(2 * 2 * 96000, pixel_rate);
	else
		pixel_rate = max(2 * 96000, pixel_rate);

Maybe we'd be able to use the macro in other places too (I haven't
checked). The new macro would definitely be part of a separate patch on
top of these.



> +			pixel_rate = max(2 * 96000, pixel_rate);
> +	}
> +
>  	return pixel_rate;
>  }
>  
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  reply	other threads:[~2017-03-14 20:47 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-08  0:12 [PATCH v2 1/2] drm/i915/glk: Apply cdclk workaround for DP audio Dhinakaran Pandiyan
2017-03-08  0:12 ` [PATCH v2 2/2] drm/i915: Implement cdclk restrictions based on Azalia BCLK Dhinakaran Pandiyan
2017-03-14 20:47   ` Paulo Zanoni [this message]
2017-03-14 21:01     ` Pandiyan, Dhinakaran
2017-03-15  9:32       ` Jani Nikula
2017-03-15 18:03         ` Pandiyan, Dhinakaran
2017-03-15 18:16           ` Ville Syrjälä
2017-03-15 18:39             ` Paulo Zanoni
2017-03-15 19:30               ` Ville Syrjälä
2017-03-14 22:45     ` [PATCH v3 " Dhinakaran Pandiyan
2017-03-21 20:27       ` Paulo Zanoni
2017-03-29  8:50   ` [PATCH v2 " Ville Syrjälä
2017-03-29 21:16     ` Pandiyan, Dhinakaran
2017-03-30 11:42       ` Ville Syrjälä
2017-03-30 12:17         ` [Intel-gfx] " Takashi Iwai
2017-03-30 12:44           ` Ville Syrjälä
2017-03-30 18:14             ` Pandiyan, Dhinakaran
2017-03-08  0:48 ` ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/glk: Apply cdclk workaround for DP audio Patchwork
2017-03-14 20:24 ` [PATCH v2 1/2] " Paulo Zanoni
2017-03-15  8:33 ` ✗ Fi.CI.BAT: failure for series starting with [v2,1/2] drm/i915/glk: Apply cdclk workaround for DP audio (rev2) Patchwork
2017-03-15  8:47 ` ✓ Fi.CI.BAT: success " Patchwork

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