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[2001:1c00:c0c:fe00:d2ea:f29d:118b:24dc]) by smtp.gmail.com with ESMTPSA id n16sm650173ejo.54.2020.07.07.10.31.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Jul 2020 10:31:30 -0700 (PDT) To: =?UTF-8?Q?Uwe_Kleine-K=c3=b6nig?= References: <20200620121758.14836-1-hdegoede@redhat.com> <20200620121758.14836-5-hdegoede@redhat.com> <20200622073554.wf3smq3tvnr6t2xy@taurus.defre.kleine-koenig.org> <20200707073424.w6vd6e4bhl56kosd@pengutronix.de> From: Hans de Goede Message-ID: <1496178b-ce39-9285-ff75-cd39bc0e9aa7@redhat.com> Date: Tue, 7 Jul 2020 19:31:29 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.9.0 MIME-Version: 1.0 In-Reply-To: <20200707073424.w6vd6e4bhl56kosd@pengutronix.de> Content-Language: en-US Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=hdegoede@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Subject: Re: [Intel-gfx] [PATCH v3 04/15] pwm: lpss: Add range limit check for the base_unit register value X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pwm@vger.kernel.org, intel-gfx , "Rafael J . Wysocki" , linux-acpi@vger.kernel.org, dri-devel@lists.freedesktop.org, Andy Shevchenko , Mika Westerberg , Len Brown Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="windows-1252"; Format="flowed" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hi, On 7/7/20 9:34 AM, Uwe Kleine-K=C3=B6nig wrote: > On Mon, Jul 06, 2020 at 10:53:08PM +0200, Hans de Goede wrote: >> Hi, >> >> Thank you for your review and sorry for the slow reply. > = > No problem for me, I didn't hold my breath :-) > = >>>> diff --git a/drivers/pwm/pwm-lpss.c b/drivers/pwm/pwm-lpss.c >>>> index 43b1fc634af1..80d0f9c64f9d 100644 >>>> --- a/drivers/pwm/pwm-lpss.c >>>> +++ b/drivers/pwm/pwm-lpss.c >>>> @@ -97,6 +97,9 @@ static void pwm_lpss_prepare(struct pwm_lpss_chip *l= pwm, struct pwm_device *pwm, >>>> freq *=3D base_unit_range; >>>> base_unit =3D DIV_ROUND_CLOSEST_ULL(freq, c); >>> >>> DIV_ROUND_CLOSEST_ULL is most probably wrong, too. But I didn't spend >>> the time to actually confirm that. >> >> Yes I saw your comment elsewhere that the PWM API defines rounding >> in a certain direction, but fixing that falls outside of this patch. > = > Yeah, sure. > = >> [...] >> I hope this helps to explain what is going on a bit. > = > I will try to make sense of that and reply to the patch directly when I > succeeded. > = >> ### >> >> As for the behavior on base_unit=3D=3D0 in the get_state method, >> as mentioned above I wrote that when I did not fully understood >> how the controller works. >> >> We really should never encounter this. >> >> But if we do then I think closest to the truth would be: >> >> state->period =3D UINT_MAX; >> state->duty_cycle =3D 0; > = > I'd say state->period =3D 1 & state->duty_cycle =3D 0 is a better > representation. But that would suggest the output is configured for an infinitely high output frequency, but the frequency is actually 0, the reason why get_state needs to treat a base_unit val of 0 special at all is to avoid a division by 0, and in math dividing by 0 gives infinite, isn't UINT_MAX a better way to represent infinity ? Regards, Hans _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx