public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 06/23] drm/i915: introduce page_size members
Date: Tue, 05 Sep 2017 12:25:03 +0300	[thread overview]
Message-ID: <1504603503.5144.17.camel@linux.intel.com> (raw)
In-Reply-To: <20170821183503.12246-7-matthew.auld@intel.com>

On Mon, 2017-08-21 at 19:34 +0100, Matthew Auld wrote:
> In preparation for supporting huge gtt pages for the ppgtt, we introduce
> page size members for gem objects.  We fill in the page sizes by
> scanning the sg table.
> 
> v2: pass the sg_mask to set_pages
> 
> v3: calculate the sg_mask inline with populating the sg_table where
> possible, and pass to set_pages along with the pages.
> 
> Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Daniel Vetter <daniel@ffwll.ch>

<SNIP>

> @@ -2477,6 +2490,18 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
>  		__i915_gem_object_pin_pages(obj);
>  		obj->mm.quirked = true;
>  	}
> +
> +	GEM_BUG_ON(!sg_mask);

You can drop this extra newline.

> +
> +	obj->mm.page_sizes.phys = sg_mask;
> +
> +	obj->mm.page_sizes.sg = 0;

Maybe worthy a comment here that any higher multiple of supported page
sizes can be filled with current page size.

> +	for_each_set_bit(bit, &supported_page_sizes, BITS_PER_LONG) {
> +		if (obj->mm.page_sizes.phys & ~0u << bit)
> +			obj->mm.page_sizes.sg |= BIT(bit);

'i' might make this less confusing to read as BIT(i).

> +	}
> +
> +	GEM_BUG_ON(!HAS_PAGE_SIZE(i915, obj->mm.page_sizes.sg));

This usage makes me think we should call the macro HAS_PAGE_SIZES()?

> @@ -259,13 +259,19 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
>  static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
>  {
>  	struct sg_table *pages;
> +	struct scatterlist *sg;
> +	unsigned int sg_mask = 0;

As we are alternating between "unsigned long" and "unsigned int" for
the page size masks, make sure sparse is not complaining.

> +	int n;
>  
>  	pages = dma_buf_map_attachment(obj->base.import_attach,
>  				       DMA_BIDIRECTIONAL);
>  	if (IS_ERR(pages))
>  		return PTR_ERR(pages);
>  
> -	__i915_gem_object_set_pages(obj, pages);

Chris will like you if you do it here;

	sg_mask = 0;
> +	for_each_sg(pages->sgl, sg, pages->nents, n)
> +		sg_mask |= sg->length;
> +
> +	__i915_gem_object_set_pages(obj, pages, sg_mask);
>  
>  	return 0;
>  }

<SNIP>

> @@ -75,6 +76,7 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
>  	}
>  
>  create_st:
> +	sg_mask = 0;

Maybe move this just before the loop, too.

>  	st = kmalloc(sizeof(*st), GFP_KERNEL);
>  	if (!st)
>  		return -ENOMEM;
> @@ -104,6 +106,7 @@ static int i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
>  		} while (1);
>  
>  		sg_set_page(sg, page, PAGE_SIZE << order, 0);
> +		sg_mask |= PAGE_SIZE << order;
>  		st->nents++;
>  
>  		npages -= 1 << order;

<SNIP>

> +++ b/drivers/gpu/drm/i915/i915_gem_userptr.c
> @@ -422,12 +423,17 @@ st_set_pages(struct sg_table **st, struct page **pvec, int num_pages)
>  
>  		for_each_sg((*st)->sgl, sg, num_pages, n)
>  			sg_set_page(sg, pvec[n], PAGE_SIZE, 0);
> +
> +		*sg_mask = PAGE_SIZE;

This strictly assigns.

>  	} else {
>  		ret = sg_alloc_table_from_pages(*st, pvec, num_pages,
>  						0, num_pages << PAGE_SHIFT,
>  						GFP_KERNEL);
>  		if (ret)
>  			goto err;
> +
> +		for_each_sg((*st)->sgl, sg, num_pages, n)
> +			*sg_mask |= sg->length;

This appends and assumes input is zero. Maybe zero before the loop?

With above fixed, this is:

Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-09-05  9:25 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-21 18:34 [PATCH 00/23] huge gtt pages Matthew Auld
2017-08-21 18:34 ` [PATCH 01/23] mm/shmem: introduce shmem_file_setup_with_mnt Matthew Auld
2017-08-23  9:31   ` Joonas Lahtinen
2017-08-23 22:34     ` Andrew Morton
2017-08-24 12:04       ` Matthew Auld
2017-08-25 20:49         ` Andrew Morton
2017-08-29 14:09           ` Joonas Lahtinen
2017-08-21 18:34 ` [PATCH 02/23] drm/i915: introduce simple gemfs Matthew Auld
2017-08-29 14:33   ` Joonas Lahtinen
2017-08-21 18:34 ` [PATCH 03/23] drm/i915/gemfs: enable THP Matthew Auld
2017-08-29 14:49   ` Joonas Lahtinen
2017-09-04 12:09     ` Matthew Auld
2017-08-21 18:34 ` [PATCH 04/23] drm/i915: introduce page_size_mask to dev_info Matthew Auld
2017-08-21 18:34 ` [PATCH 05/23] drm/i915: push set_pages down to the callers Matthew Auld
2017-08-29 14:44   ` Joonas Lahtinen
2017-08-21 18:34 ` [PATCH 06/23] drm/i915: introduce page_size members Matthew Auld
2017-09-05  9:25   ` Joonas Lahtinen [this message]
2017-08-21 18:34 ` [PATCH 07/23] drm/i915: introduce vm set_pages/clear_pages Matthew Auld
2017-08-21 18:34 ` [PATCH 08/23] drm/i915: align the vma start to the largest gtt page size Matthew Auld
2017-08-21 18:34 ` [PATCH 09/23] drm/i915: align 64K objects to 2M Matthew Auld
2017-08-21 18:34 ` [PATCH 10/23] drm/i915: enable IPS bit for 64K pages Matthew Auld
2017-08-21 18:34 ` [PATCH 11/23] drm/i915: disable GTT cache for 2M/1G pages Matthew Auld
2017-08-21 18:34 ` [PATCH 12/23] drm/i915: support 1G pages for the 48b PPGTT Matthew Auld
2017-08-21 18:34 ` [PATCH 13/23] drm/i915: support 2M " Matthew Auld
2017-08-21 18:34 ` [PATCH 14/23] drm/i915: add support for 64K scratch page Matthew Auld
2017-08-21 18:34 ` [PATCH 15/23] drm/i915: support 64K pages for the 48b PPGTT Matthew Auld
2017-08-21 18:34 ` [PATCH 16/23] drm/i915: accurate page size tracking for the ppgtt Matthew Auld
2017-08-21 18:34 ` [PATCH 17/23] drm/i915/debugfs: include some gtt page size metrics Matthew Auld
2017-08-21 18:34 ` [PATCH 18/23] drm/i915/selftests: huge page tests Matthew Auld
2017-08-24 17:56   ` kbuild test robot
2017-08-28 14:36     ` Chris Wilson
2017-08-21 18:34 ` [PATCH 19/23] drm/i915/selftests: mix huge pages Matthew Auld
2017-08-21 18:35 ` [PATCH 20/23] drm/i915: disable platform support for vGPU huge gtt pages Matthew Auld
2017-08-21 18:35 ` [PATCH 21/23] drm/i915: enable platform support for 64K pages Matthew Auld
2017-08-21 18:35 ` [PATCH 22/23] drm/i915: enable platform support for 2M pages Matthew Auld
2017-08-21 18:35 ` [PATCH 23/23] drm/i915: enable platform support for 1G pages Matthew Auld
2017-08-21 18:54 ` ✓ Fi.CI.BAT: success for huge gtt pages (rev7) Patchwork
2017-08-22 14:21 ` [PATCH 00/23] huge gtt pages Chris Wilson
2017-08-22 14:23   ` Chris Wilson
2017-08-22 15:23     ` Matthew Auld

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1504603503.5144.17.camel@linux.intel.com \
    --to=joonas.lahtinen@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.auld@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox