* [PATCH] drm/i915/cnl: Add Gen10 LRC size
@ 2017-09-21 23:19 Oscar Mateo
2017-09-22 10:33 ` ✓ Fi.CI.BAT: success for " Patchwork
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Oscar Mateo @ 2017-09-21 23:19 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky, Rodrigo Vivi
The total size of the context has decreased with the removal of the
URB_ATOMIC section. BSpec indicates 16750 DWORDs (17 pages), plus
one page for PPHWSP, and I'm throwing an extra page for precaution.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 3d135c3..a3115f3 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -39,6 +39,7 @@
#define GEN8_LR_CONTEXT_RENDER_SIZE (20 * PAGE_SIZE)
#define GEN9_LR_CONTEXT_RENDER_SIZE (22 * PAGE_SIZE)
+#define GEN10_LR_CONTEXT_RENDER_SIZE (19 * PAGE_SIZE)
#define GEN8_LR_CONTEXT_OTHER_SIZE ( 2 * PAGE_SIZE)
@@ -150,6 +151,7 @@ struct engine_info {
default:
MISSING_CASE(INTEL_GEN(dev_priv));
case 10:
+ return GEN10_LR_CONTEXT_RENDER_SIZE;
case 9:
return GEN9_LR_CONTEXT_RENDER_SIZE;
case 8:
--
1.9.1
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^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/cnl: Add Gen10 LRC size
2017-09-21 23:19 [PATCH] drm/i915/cnl: Add Gen10 LRC size Oscar Mateo
@ 2017-09-22 10:33 ` Patchwork
2017-09-22 12:39 ` ✓ Fi.CI.IGT: " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-09-22 10:33 UTC (permalink / raw)
To: Oscar Mateo; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/cnl: Add Gen10 LRC size
URL : https://patchwork.freedesktop.org/series/30724/
State : success
== Summary ==
Series 30724v1 drm/i915/cnl: Add Gen10 LRC size
https://patchwork.freedesktop.org/api/1.0/series/30724/revisions/1/mbox/
fi-bdw-5557u total:289 pass:268 dwarn:0 dfail:0 fail:0 skip:21 time:448s
fi-bdw-gvtdvm total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:471s
fi-blb-e6850 total:289 pass:224 dwarn:1 dfail:0 fail:0 skip:64 time:418s
fi-bsw-n3050 total:289 pass:243 dwarn:0 dfail:0 fail:0 skip:46 time:522s
fi-bwr-2160 total:289 pass:184 dwarn:0 dfail:0 fail:0 skip:105 time:278s
fi-bxt-j4205 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:503s
fi-byt-j1900 total:289 pass:254 dwarn:1 dfail:0 fail:0 skip:34 time:489s
fi-byt-n2820 total:289 pass:250 dwarn:1 dfail:0 fail:0 skip:38 time:491s
fi-cfl-s total:289 pass:223 dwarn:34 dfail:0 fail:0 skip:32 time:542s
fi-elk-e7500 total:289 pass:230 dwarn:0 dfail:0 fail:0 skip:59 time:423s
fi-glk-1 total:289 pass:260 dwarn:0 dfail:0 fail:0 skip:29 time:565s
fi-hsw-4770 total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:426s
fi-hsw-4770r total:289 pass:263 dwarn:0 dfail:0 fail:0 skip:26 time:405s
fi-ilk-650 total:289 pass:229 dwarn:0 dfail:0 fail:0 skip:60 time:433s
fi-ivb-3520m total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:481s
fi-ivb-3770 total:289 pass:261 dwarn:0 dfail:0 fail:0 skip:28 time:459s
fi-kbl-7500u total:289 pass:264 dwarn:1 dfail:0 fail:0 skip:24 time:472s
fi-kbl-7560u total:289 pass:270 dwarn:0 dfail:0 fail:0 skip:19 time:575s
fi-kbl-r total:289 pass:262 dwarn:0 dfail:0 fail:0 skip:27 time:590s
fi-pnv-d510 total:289 pass:223 dwarn:1 dfail:0 fail:0 skip:65 time:542s
fi-skl-6260u total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:451s
fi-skl-6700k total:289 pass:265 dwarn:0 dfail:0 fail:0 skip:24 time:748s
fi-skl-6770hq total:289 pass:269 dwarn:0 dfail:0 fail:0 skip:20 time:490s
fi-skl-gvtdvm total:289 pass:266 dwarn:0 dfail:0 fail:0 skip:23 time:476s
fi-snb-2520m total:289 pass:251 dwarn:0 dfail:0 fail:0 skip:38 time:565s
fi-snb-2600 total:289 pass:249 dwarn:0 dfail:0 fail:1 skip:39 time:419s
b32248fc0bd87b45bc068f234f061324a29fa809 drm-tip: 2017y-09m-21d-22h-36m-39s UTC integration manifest
a4ff41c55dab drm/i915/cnl: Add Gen10 LRC size
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5787/
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^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/cnl: Add Gen10 LRC size
2017-09-21 23:19 [PATCH] drm/i915/cnl: Add Gen10 LRC size Oscar Mateo
2017-09-22 10:33 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-09-22 12:39 ` Patchwork
2017-09-22 13:29 ` [PATCH] " Rodrigo Vivi
2017-09-29 10:24 ` Joonas Lahtinen
3 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2017-09-22 12:39 UTC (permalink / raw)
To: Oscar Mateo; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/cnl: Add Gen10 LRC size
URL : https://patchwork.freedesktop.org/series/30724/
State : success
== Summary ==
Test perf:
Subgroup polling:
fail -> PASS (shard-hsw) fdo#102252
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
shard-hsw total:2429 pass:1329 dwarn:6 dfail:0 fail:11 skip:1083 time:9748s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5787/shards.html
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/cnl: Add Gen10 LRC size
2017-09-21 23:19 [PATCH] drm/i915/cnl: Add Gen10 LRC size Oscar Mateo
2017-09-22 10:33 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-09-22 12:39 ` ✓ Fi.CI.IGT: " Patchwork
@ 2017-09-22 13:29 ` Rodrigo Vivi
2017-09-22 14:21 ` Rodrigo Vivi
2017-09-29 10:24 ` Joonas Lahtinen
3 siblings, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2017-09-22 13:29 UTC (permalink / raw)
To: Oscar Mateo; +Cc: intel-gfx, Ben Widawsky
On Thu, Sep 21, 2017 at 11:19:49PM +0000, Oscar Mateo wrote:
> The total size of the context has decreased with the removal of the
> URB_ATOMIC section. BSpec indicates 16750 DWORDs (17 pages), plus
> one page for PPHWSP, and I'm throwing an extra page for precaution.
I could never find this info on bspec... could you please point that to
me?
Anyways this value matches with other HW engineers had told me a while
ago, and we now have CNL on CI, so:
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Ben Widawsky <ben@bwidawsk.net>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 3d135c3..a3115f3 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -39,6 +39,7 @@
>
> #define GEN8_LR_CONTEXT_RENDER_SIZE (20 * PAGE_SIZE)
> #define GEN9_LR_CONTEXT_RENDER_SIZE (22 * PAGE_SIZE)
> +#define GEN10_LR_CONTEXT_RENDER_SIZE (19 * PAGE_SIZE)
>
> #define GEN8_LR_CONTEXT_OTHER_SIZE ( 2 * PAGE_SIZE)
>
> @@ -150,6 +151,7 @@ struct engine_info {
> default:
> MISSING_CASE(INTEL_GEN(dev_priv));
> case 10:
> + return GEN10_LR_CONTEXT_RENDER_SIZE;
> case 9:
> return GEN9_LR_CONTEXT_RENDER_SIZE;
> case 8:
> --
> 1.9.1
>
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/cnl: Add Gen10 LRC size
2017-09-22 13:29 ` [PATCH] " Rodrigo Vivi
@ 2017-09-22 14:21 ` Rodrigo Vivi
0 siblings, 0 replies; 6+ messages in thread
From: Rodrigo Vivi @ 2017-09-22 14:21 UTC (permalink / raw)
To: Oscar Mateo, Rodrigo Vivi; +Cc: Ben Widawsky, intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 2052 bytes --]
On Fri, Sep 22, 2017 at 6:31 AM Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Thu, Sep 21, 2017 at 11:19:49PM +0000, Oscar Mateo wrote:
> > The total size of the context has decreased with the removal of the
> > URB_ATOMIC section. BSpec indicates 16750 DWORDs (17 pages), plus
> > one page for PPHWSP, and I'm throwing an extra page for precaution.
>
> I could never find this info on bspec... could you please point that to
> me?
Michal already pointed the doc to me!
Now I know where that comes from! :)
Patch Merges to dinq.
Thanks
>
> Anyways this value matches with other HW engineers had told me a while
> ago, and we now have CNL on CI, so:
>
> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> >
> > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> > Cc: Ben Widawsky <ben@bwidawsk.net>
> > ---
> > drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c
> b/drivers/gpu/drm/i915/intel_engine_cs.c
> > index 3d135c3..a3115f3 100644
> > --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> > +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> > @@ -39,6 +39,7 @@
> >
> > #define GEN8_LR_CONTEXT_RENDER_SIZE (20 * PAGE_SIZE)
> > #define GEN9_LR_CONTEXT_RENDER_SIZE (22 * PAGE_SIZE)
> > +#define GEN10_LR_CONTEXT_RENDER_SIZE (19 * PAGE_SIZE)
> >
> > #define GEN8_LR_CONTEXT_OTHER_SIZE ( 2 * PAGE_SIZE)
> >
> > @@ -150,6 +151,7 @@ struct engine_info {
> > default:
> > MISSING_CASE(INTEL_GEN(dev_priv));
> > case 10:
> > + return GEN10_LR_CONTEXT_RENDER_SIZE;
> > case 9:
> > return GEN9_LR_CONTEXT_RENDER_SIZE;
> > case 8:
> > --
> > 1.9.1
> >
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] drm/i915/cnl: Add Gen10 LRC size
2017-09-21 23:19 [PATCH] drm/i915/cnl: Add Gen10 LRC size Oscar Mateo
` (2 preceding siblings ...)
2017-09-22 13:29 ` [PATCH] " Rodrigo Vivi
@ 2017-09-29 10:24 ` Joonas Lahtinen
3 siblings, 0 replies; 6+ messages in thread
From: Joonas Lahtinen @ 2017-09-29 10:24 UTC (permalink / raw)
To: Oscar Mateo, intel-gfx; +Cc: Ben Widawsky, Rodrigo Vivi
On Thu, 2017-09-21 at 16:19 -0700, Oscar Mateo wrote:
> The total size of the context has decreased with the removal of the
> URB_ATOMIC section. BSpec indicates 16750 DWORDs (17 pages), plus
> one page for PPHWSP, and I'm throwing an extra page for precaution.
Rather no precaution, or make it for all gens and add a comment.
It's otherwise super confusing to double-check the correctness, been
there, done that :)
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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^ permalink raw reply [flat|nested] 6+ messages in thread
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Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
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2017-09-21 23:19 [PATCH] drm/i915/cnl: Add Gen10 LRC size Oscar Mateo
2017-09-22 10:33 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-09-22 12:39 ` ✓ Fi.CI.IGT: " Patchwork
2017-09-22 13:29 ` [PATCH] " Rodrigo Vivi
2017-09-22 14:21 ` Rodrigo Vivi
2017-09-29 10:24 ` Joonas Lahtinen
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