public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Mika Kahola <mika.kahola@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 04/13] drm/i915: Unify and export gen9+ port_clock calculation.
Date: Thu, 05 Oct 2017 13:49:17 +0300	[thread overview]
Message-ID: <1507200557.3274.83.camel@intel.com> (raw)
In-Reply-To: <20171004212656.me5go7nikfqbclvk@intel.com>

On Wed, 2017-10-04 at 14:26 -0700, Rodrigo Vivi wrote:
> On Wed, Oct 04, 2017 at 07:38:16PM +0000, Rodrigo Vivi wrote:
> > 
> > On Wed, Oct 04, 2017 at 06:39:19AM +0000, Mika Kahola wrote:
> > > 
> > > On Tue, 2017-10-03 at 00:06 -0700, Rodrigo Vivi wrote:
> > > > 
> > > > On Cannonlake the DVFS level selection depends on the
> > > > port clock.
> > > > 
> > > > So let's re-org in a way that we can easily export without
> > > > duplicating any code.
> > > > 
> > > > v2: Rebased on changes on previous patches
> > > > 
> > > > Cc: Mika Kahola <mika.kahola@intel.com>
> > > > Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/intel_ddi.c | 21 ++++++++++++++++++---
> > > >  drivers/gpu/drm/i915/intel_drv.h |  3 ++-
> > > >  2 files changed, 20 insertions(+), 4 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/intel_ddi.c
> > > > b/drivers/gpu/drm/i915/intel_ddi.c
> > > > index 92eabb6cc1ab..ee64b1a50453 100644
> > > > --- a/drivers/gpu/drm/i915/intel_ddi.c
> > > > +++ b/drivers/gpu/drm/i915/intel_ddi.c
> > > > @@ -1297,7 +1297,7 @@ static void cnl_ddi_clock_get(struct
> > > > intel_encoder *encoder,
> > > >  
> > > >  	pll_id = intel_get_shared_dpll_id(dev_priv,
> > > > pipe_config-
> > > > > 
> > > > > shared_dpll);
> > > >  
> > > > -	pipe_config->port_clock = cnl_calc_pll_link(dev_priv,
> > > > pll_id);
> > > > +	pipe_config->port_clock =
> > > > intel_ddi_port_clock(dev_priv,
> > > > pll_id);
> > > >  
> > > >  	ddi_dotclock_get(pipe_config);
> > > >  }
> > > > @@ -1353,7 +1353,7 @@ static void skl_ddi_clock_get(struct
> > > > intel_encoder *encoder,
> > > >  
> > > >  	pll_id = intel_get_shared_dpll_id(dev_priv,
> > > > pipe_config-
> > > > > 
> > > > > shared_dpll);
> > > >  
> > > > -	pipe_config->port_clock = skl_calc_pll_link(dev_priv,
> > > > pll_id);
> > > > +	pipe_config->port_clock =
> > > > intel_ddi_port_clock(dev_priv,
> > > > pll_id);
> > > >  
> > > >  	ddi_dotclock_get(pipe_config);
> > > >  }
> > > > @@ -1437,11 +1437,26 @@ static void bxt_ddi_clock_get(struct
> > > > intel_encoder *encoder,
> > > >  	enum port port = intel_ddi_get_encoder_port(encoder);
> > > >  	enum intel_dpll_id pll_id = port;
> > > >  
> > > > -	pipe_config->port_clock = bxt_calc_pll_link(dev_priv,
> > > > pll_id);
> > > > +	pipe_config->port_clock =
> > > > intel_ddi_port_clock(dev_priv,
> > > > pll_id);
> > > >  
> > > >  	ddi_dotclock_get(pipe_config);
> > > >  }
> > > >  
> > > > +int intel_ddi_port_clock(struct drm_i915_private *dev_priv,
> > > > +			 enum intel_dpll_id pll_id)
> > > > +{
> > > > +	if (IS_GEN9_BC(dev_priv)) {
> > > > +		return skl_calc_pll_link(dev_priv, pll_id);
> > > > +	} else if (IS_GEN9_LP(dev_priv)) {
> > > > +		return bxt_calc_pll_link(dev_priv, pll_id);
> > > > +	} else if (IS_CANNONLAKE(dev_priv)) {
> > > > +		return cnl_calc_pll_link(dev_priv, pll_id);
> > > > +	} else {
> > > > +		MISSING_CASE(INTEL_GEN(dev_priv));
> > > > +		return 0;
> > > > +	}
> > > > +}
> > > Personally, I feel that we wouldn't need to unify this. We call
> > > platform specific functions from this intel_ddi_port_clock() and
> > > this
> > > is called from platform specific *_ddi_clock_get() routine. Why
> > > not
> > > just keep all platform specific functions in one place?
> > Yeap, it is indeed silly to unify since we are just calling it
> > from the specific functions.
> > 
> > Let's drop this patch ;)
> oh no! wait! I was rebasing here and I'm not sure I want to drop this
> patch.
> 
> my OCD prefers to export general functions and leave platform
> specific
> functions as static instead of exporting all specific platforms one.
> Apparently in the future we will always need this port clock for dvfs
> functions called from both places cdclk and dpll so every platform
> exporting a specific function won't be ideal.
> 
> so imo it would be good if we could organize this one starting here
> already.
Ok, fair enough :) to be future proof we can export only general
functions and leave platform specific routines as static ones.

Therefore, you can bash my r-b

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> 
> > 
> > 
> > > 
> > > 
> > > Paolo, any opinions on this one?
> > > 
> > > > 
> > > > +
> > > >  void intel_ddi_clock_get(struct intel_encoder *encoder,
> > > >  			 struct intel_crtc_state *pipe_config)
> > > >  {
> > > > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > > > b/drivers/gpu/drm/i915/intel_drv.h
> > > > index 0cab667fff57..fe4650d6db03 100644
> > > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > > @@ -1293,7 +1293,8 @@ bool intel_ddi_is_audio_enabled(struct
> > > > drm_i915_private *dev_priv,
> > > >  				 struct intel_crtc
> > > > *intel_crtc);
> > > >  void intel_ddi_get_config(struct intel_encoder *encoder,
> > > >  			  struct intel_crtc_state
> > > > *pipe_config);
> > > > -
> > > > +int intel_ddi_port_clock(struct drm_i915_private *dev_priv,
> > > > +			 enum intel_dpll_id pll_id);
> > > >  void intel_ddi_clock_get(struct intel_encoder *encoder,
> > > >  			 struct intel_crtc_state
> > > > *pipe_config);
> > > >  void intel_ddi_set_vc_payload_alloc(const struct
> > > > intel_crtc_state
> > > > *crtc_state,
-- 
Mika Kahola - Intel OTC

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-10-05 10:47 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-03  7:06 [PATCH 00/13] DVFS v2 Rodrigo Vivi
2017-10-03  7:06 ` [PATCH 01/13] drm/i915: Let's use more enum intel_dpll_id pll_id Rodrigo Vivi
2017-10-03  9:33   ` Mika Kahola
2017-10-03  7:06 ` [PATCH 02/13] drm/i915/cnl: Extract cnl_calc_pll_link following bxt style Rodrigo Vivi
2017-10-03 10:00   ` Mika Kahola
2017-10-03  7:06 ` [PATCH 03/13] drm/i915/skl: Extract skl_calc_pll_link following bxt, cnl style Rodrigo Vivi
2017-10-03 13:18   ` Mika Kahola
2017-10-03  7:06 ` [PATCH 04/13] drm/i915: Unify and export gen9+ port_clock calculation Rodrigo Vivi
2017-10-04  6:39   ` Mika Kahola
2017-10-04 19:38     ` Rodrigo Vivi
2017-10-04 21:26       ` Rodrigo Vivi
2017-10-05 10:49         ` Mika Kahola [this message]
2017-10-03  7:06 ` [PATCH 05/13] drm/i915/cnl: extract cnl_dvfs_{pre, post}_change Rodrigo Vivi
2017-10-04 21:58   ` Ausmus, James
2017-10-04 22:05   ` Manasi Navare
2017-10-03  7:06 ` [PATCH 06/13] drm/i915/cnl: Expose DVFS change functions Rodrigo Vivi
2017-10-04 22:07   ` Manasi Navare
2017-10-03  7:06 ` [PATCH 07/13] drm/i915/cnl: DVFS for PLL enabling Rodrigo Vivi
2017-10-04 22:22   ` Manasi Navare
2017-10-17 15:44   ` Ville Syrjälä
2017-10-17 16:47     ` Rodrigo Vivi
2017-10-17 17:23       ` Ville Syrjälä
2017-10-17 17:45         ` Rodrigo Vivi
2017-10-17 18:02           ` Ville Syrjälä
2017-10-17 20:36             ` Ville Syrjälä
2017-10-17 23:23               ` Rodrigo Vivi
2017-10-18 13:23                 ` Ville Syrjälä
2017-10-03  7:06 ` [PATCH 08/13] drm/i915/cnl: DVFS for PLL disabling Rodrigo Vivi
2017-10-04 22:23   ` Manasi Navare
2017-10-03  7:06 ` [PATCH 09/13] drm/i915/cnl: Invert dvfs default level Rodrigo Vivi
2017-10-04  9:46   ` Mika Kahola
2017-10-04 19:36     ` Rodrigo Vivi
2017-10-04 22:40       ` Manasi Navare
2017-10-04 23:03         ` Manasi Navare
2017-10-03  7:06 ` [PATCH 10/13] drm/i915/cnl: Unify dvfs level selection Rodrigo Vivi
2017-10-04 13:20   ` Mika Kahola
2017-10-05 14:59     ` Rodrigo Vivi
2017-10-18 18:22       ` Paulo Zanoni
2017-10-03  7:06 ` [PATCH 11/13] drm/i915/cnl: Only request voltage frequency switching when needed Rodrigo Vivi
2017-10-05 12:07   ` Mika Kahola
2017-10-05 15:00     ` Rodrigo Vivi
2017-10-03  7:06 ` [PATCH 12/13] drm/i915/cnl: When disabling pll put dvfs back to cdclk requirement Rodrigo Vivi
2017-10-03  7:06 ` [PATCH 13/13] drm/i915: Make DVFS more generic and document them Rodrigo Vivi
2017-10-03  7:42 ` ✓ Fi.CI.BAT: success for DVFS v2 Patchwork
2017-10-03  9:07 ` ✗ Fi.CI.IGT: warning " Patchwork
2017-10-03 19:51 ` ✓ Fi.CI.BAT: success " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1507200557.3274.83.camel@intel.com \
    --to=mika.kahola@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=paulo.r.zanoni@intel.com \
    --cc=rodrigo.vivi@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox