From: Oscar Mateo <oscar.mateo@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH v3 12/22] drm/i915/gen9: Move GT and Display workarounds from init_clock_gating
Date: Fri, 13 Oct 2017 13:54:06 -0700 [thread overview]
Message-ID: <1507928056-6966-13-git-send-email-oscar.mateo@intel.com> (raw)
In-Reply-To: <1507928056-6966-1-git-send-email-oscar.mateo@intel.com>
To their rightful place inside intel_workarounds.c
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 51 ------------------------------
drivers/gpu/drm/i915/intel_workarounds.c | 54 ++++++++++++++++++++++++++++++++
2 files changed, 54 insertions(+), 51 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3f92bed1..ef74251 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -57,53 +57,8 @@
#define INTEL_RC6p_ENABLE (1<<1)
#define INTEL_RC6pp_ENABLE (1<<2)
-static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
-{
- if (HAS_LLC(dev_priv)) {
- /*
- * WaCompressedResourceDisplayNewHashMode:skl,kbl
- * Display WA#0390: skl,kbl
- *
- * Must match Sampler, Pixel Back End, and Media. See
- * WaCompressedResourceSamplerPbeMediaNewHashMode.
- */
- I915_WRITE(CHICKEN_PAR1_1,
- I915_READ(CHICKEN_PAR1_1) |
- SKL_DE_COMPRESSED_HASH_MODE);
- }
-
- /* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl,cfl */
- I915_WRITE(CHICKEN_PAR1_1,
- I915_READ(CHICKEN_PAR1_1) | SKL_EDP_PSR_FIX_RDWRAP);
-
- I915_WRITE(GEN8_CONFIG0,
- I915_READ(GEN8_CONFIG0) | GEN9_DEFAULT_FIXES);
-
- /* WaEnableChickenDCPR:skl,bxt,kbl,glk,cfl */
- I915_WRITE(GEN8_CHICKEN_DCPR_1,
- I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM);
-
- /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl,cfl */
- /* WaFbcWakeMemOn:skl,bxt,kbl,glk,cfl */
- I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
- DISP_FBC_WM_DIS |
- DISP_FBC_MEMORY_WAKE);
-
- /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */
- I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
- ILK_DPFC_DISABLE_DUMMY0);
-
- if (IS_SKYLAKE(dev_priv)) {
- /* WaDisableDopClockGating */
- I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL)
- & ~GEN7_DOP_CLOCK_GATE_ENABLE);
- }
-}
-
static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
{
- gen9_init_clock_gating(dev_priv);
-
/* WaDisableSDEUnitClockGating:bxt */
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
@@ -126,7 +81,6 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
{
u32 val;
- gen9_init_clock_gating(dev_priv);
/*
* WaDisablePWMClockGating:glk
@@ -8512,7 +8466,6 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
{
cnp_init_clock_gating(dev_priv);
- gen9_init_clock_gating(dev_priv);
/* WaFbcNukeOnHostModify:cfl */
I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
@@ -8521,8 +8474,6 @@ static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
{
- gen9_init_clock_gating(dev_priv);
-
/* WaDisableSDEUnitClockGating:kbl */
if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
@@ -8540,8 +8491,6 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
{
- gen9_init_clock_gating(dev_priv);
-
/* WAC6entrylatency:skl */
I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
FBC_LLC_FULLY_OPEN);
diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
index 222f45c..5c9b312 100644
--- a/drivers/gpu/drm/i915/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/intel_workarounds.c
@@ -573,6 +573,8 @@ static int chv_gt_workarounds_init(struct drm_i915_private *dev_priv)
static int gen9_gt_workarounds_init(struct drm_i915_private *dev_priv)
{
+ GT_WA_SET_BIT(GEN8_CONFIG0, GEN9_DEFAULT_FIXES);
+
if (HAS_LLC(dev_priv)) {
/* WaCompressedResourceSamplerPbeMediaNewHashMode:skl,kbl
*
@@ -833,28 +835,80 @@ static int chv_display_workarounds_init(struct drm_i915_private *dev_priv)
return 0;
}
+static int gen9_display_workarounds_init(struct drm_i915_private *dev_priv)
+{
+ if (HAS_LLC(dev_priv)) {
+ /*
+ * WaCompressedResourceDisplayNewHashMode:skl,kbl
+ * Display WA#0390: skl,kbl
+ *
+ * Must match Sampler, Pixel Back End, and Media. See
+ * WaCompressedResourceSamplerPbeMediaNewHashMode.
+ */
+ DISPLAY_WA_SET_BIT(CHICKEN_PAR1_1, SKL_DE_COMPRESSED_HASH_MODE);
+ }
+
+ /* See Bspec note for PSR2_CTL bit 31, Wa#828:skl,bxt,kbl,cfl */
+ DISPLAY_WA_SET_BIT(CHICKEN_PAR1_1, SKL_EDP_PSR_FIX_RDWRAP);
+
+ /* WaEnableChickenDCPR:skl,bxt,kbl,glk,cfl */
+ DISPLAY_WA_SET_BIT(GEN8_CHICKEN_DCPR_1, MASK_WAKEMEM);
+
+ /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl,cfl */
+ /* WaFbcWakeMemOn:skl,bxt,kbl,glk,cfl */
+ DISPLAY_WA_SET_BIT(DISP_ARB_CTL, DISP_FBC_WM_DIS | DISP_FBC_MEMORY_WAKE);
+
+ /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */
+ DISPLAY_WA_SET_BIT(ILK_DPFC_CHICKEN, ILK_DPFC_DISABLE_DUMMY0);
+
+ return 0;
+}
+
static int skl_display_workarounds_init(struct drm_i915_private *dev_priv)
{
+ int ret = gen9_display_workarounds_init(dev_priv);
+ if (ret)
+ return ret;
+
+ /* WaDisableDopClockGating */
+ DISPLAY_WA_CLR_BIT(GEN7_MISCCPCTL, GEN7_DOP_CLOCK_GATE_ENABLE);
+
return 0;
}
static int bxt_display_workarounds_init(struct drm_i915_private *dev_priv)
{
+ int ret = gen9_display_workarounds_init(dev_priv);
+ if (ret)
+ return ret;
+
return 0;
}
static int kbl_display_workarounds_init(struct drm_i915_private *dev_priv)
{
+ int ret = gen9_display_workarounds_init(dev_priv);
+ if (ret)
+ return ret;
+
return 0;
}
static int glk_display_workarounds_init(struct drm_i915_private *dev_priv)
{
+ int ret = gen9_display_workarounds_init(dev_priv);
+ if (ret)
+ return ret;
+
return 0;
}
static int cfl_display_workarounds_init(struct drm_i915_private *dev_priv)
{
+ int ret = gen9_display_workarounds_init(dev_priv);
+ if (ret)
+ return ret;
+
return 0;
}
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2017-10-13 20:54 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-13 20:53 [PATCH v3 00/22] Refactor HW workaround code Oscar Mateo
2017-10-13 20:53 ` [PATCH v3 01/22] drm/i915: Use a mask when applying WaProgramL3SqcReg1Default Oscar Mateo
2017-10-13 21:28 ` Chris Wilson
2017-10-14 0:26 ` Michel Thierry
2017-10-13 20:53 ` [PATCH v3 02/22] drm/i915: No need for RING_MAX_NONPRIV_SLOTS space Oscar Mateo
2017-10-13 20:53 ` [PATCH v3 03/22] drm/i915: Move a bunch of workaround-related code to its own file Oscar Mateo
2017-10-13 20:53 ` [PATCH v3 04/22] drm/i915: Split out functions for different kinds of workarounds Oscar Mateo
2017-10-13 20:53 ` [PATCH v3 05/22] drm/i915: Rename saved workarounds to make it explicit that they are context WAs Oscar Mateo
2017-10-13 20:54 ` [PATCH v3 06/22] drm/i915: Save all GT WAs and apply them at a later time Oscar Mateo
2017-10-17 12:37 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 07/22] drm/i915: Save all Whitelist " Oscar Mateo
2017-10-17 12:38 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 08/22] drm/i915: Create a new category of display WAs Oscar Mateo
2017-10-17 12:42 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 09/22] drm/i915: Print all workaround types correctly in debugfs Oscar Mateo
2017-10-17 12:45 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 10/22] drm/i915: Move WA BB stuff to the workarounds file as well Oscar Mateo
2017-10-17 12:49 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 11/22] drm/i915/cnl: Move GT and Display workarounds from init_clock_gating Oscar Mateo
2017-10-17 12:52 ` Chris Wilson
2017-10-17 21:22 ` Oscar Mateo
2017-10-18 12:44 ` Ville Syrjälä
2017-10-30 20:05 ` Oscar Mateo
2017-10-13 20:54 ` Oscar Mateo [this message]
2017-10-17 12:53 ` [PATCH v3 12/22] drm/i915/gen9: " Chris Wilson
2017-10-13 20:54 ` [PATCH v3 13/22] drm/i915/gen9: Remove Gen9 WAs with no effect Oscar Mateo
2017-10-13 20:54 ` [PATCH v3 14/22] drm/i915/cfl: Move GT and Display workarounds from init_clock_gating Oscar Mateo
2017-10-17 12:54 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 15/22] drm/i915/glk: " Oscar Mateo
2017-10-17 12:57 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 16/22] drm/i915/kbl: " Oscar Mateo
2017-10-17 12:58 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 17/22] drm/i915/bxt: " Oscar Mateo
2017-10-17 12:58 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 18/22] drm/i915/skl: " Oscar Mateo
2017-10-17 12:59 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 19/22] drm/i915/chv: " Oscar Mateo
2017-10-17 13:02 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 20/22] drm/i915/bdw: " Oscar Mateo
2017-10-17 13:03 ` Chris Wilson
2017-10-30 20:08 ` Oscar Mateo
2017-10-13 20:54 ` [PATCH v3 21/22] drm/i915: Move WaProgramL3SqcReg1Default to the workarounds file Oscar Mateo
2017-10-17 13:05 ` Chris Wilson
2017-10-13 20:54 ` [PATCH v3 22/22] drm/i915: Document the i915_workarounds file Oscar Mateo
2017-10-13 21:48 ` ✗ Fi.CI.BAT: failure for Refactor HW workaround code (rev3) Patchwork
2017-10-17 13:06 ` [PATCH v3 00/22] Refactor HW workaround code Chris Wilson
2017-10-30 20:07 ` Oscar Mateo
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1507928056-6966-13-git-send-email-oscar.mateo@intel.com \
--to=oscar.mateo@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=rodrigo.vivi@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox