From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Oscar Mateo <oscar.mateo@intel.com>,
"De Marchi, Lucas" <lucas.demarchi@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 02/27] drm/i915/icl: Add the ICL PCI IDs
Date: Wed, 10 Jan 2018 12:08:42 -0200 [thread overview]
Message-ID: <1515593322.22902.24.camel@intel.com> (raw)
In-Reply-To: <09c9ba56-df48-150f-cd7f-d2385aac762a@intel.com>
Em Ter, 2018-01-09 às 17:07 -0800, Oscar Mateo escreveu:
>
> On 01/09/2018 05:02 PM, De Marchi, Lucas wrote:
> > On Tue, 2018-01-09 at 16:09 -0800, Oscar Mateo wrote:
> > > On 01/09/2018 03:23 PM, Paulo Zanoni wrote:
> > > > This is the current PCI ID list in our documentation.
> > > >
> > > > Let's leave the _gt#_ part out for now since our current
> > > > documentation
> > > > is not 100% clear and we don't need this info now anyway.
> > > >
> > > > v2: Use the new ICL_11 naming (Kelvin Gardiner).
> > > > v3: Latest IDs as per BSpec (Oscar).
> > > > v4: Make it compile (Paulo).
> > > > v5: Remove comments (Lucas).
> > > > v6: Multile rebases (Paulo).
> > > >
> > > > Reviewed-by: Anuj Phogat <anuj.phogat@intel.com> (v1)
> > > > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > > > Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
> > > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/i915_pci.c | 1 +
> > > > include/drm/i915_pciids.h | 11 +++++++++++
> > > > 2 files changed, 12 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/i915_pci.c
> > > > b/drivers/gpu/drm/i915/i915_pci.c
> > > > index 88cd4a3b12f5..0a807bb44583 100644
> > > > --- a/drivers/gpu/drm/i915/i915_pci.c
> > > > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > > > @@ -651,6 +651,7 @@ static const struct pci_device_id
> > > > pciidlist[] = {
> > > > INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> > > > INTEL_CNL_U_GT2_IDS(&intel_cannonlake_gt2_info),
> > > > INTEL_CNL_Y_GT2_IDS(&intel_cannonlake_gt2_info),
> > > > + INTEL_ICL_11_IDS(&intel_icelake_11_info),
> > > > {0, 0, 0}
> > > > };
> > >
> > > And apparently the latest trend here is to add the GT info (as
> > > per a
> > > patch from Lionel) which we are also not doing in ICL yet.
> >
> > With a reason... that I think is well explained in the commit
> > message, isn't
> > it?
> >
>
> Yeah, I just saw that warning in the commit message (right when I
> was
> wondering how to represent a GT 0.5...). Paulo: are we still happy
> with
> this patch as is?
Well, I am :).
> Also: do we want to split the table into Y & U skus
> like CNL does now?
There's a CNL patch from Rodrigo unsplitting the Y&U thing.
>
> > Lucas De Marchi
> >
> > > > MODULE_DEVICE_TABLE(pci, pciidlist);
> > > > diff --git a/include/drm/i915_pciids.h
> > > > b/include/drm/i915_pciids.h
> > > > index 5db0458dd832..a967fa3838fb 100644
> > > > --- a/include/drm/i915_pciids.h
> > > > +++ b/include/drm/i915_pciids.h
> > > > @@ -434,4 +434,15 @@
> > > > INTEL_CNL_U_GT2_IDS(info), \
> > > > INTEL_CNL_Y_GT2_IDS(info)
> > > >
> > > > +#define INTEL_ICL_11_IDS(info) \
> > > > + INTEL_VGA_DEVICE(0x8A50, info), \
> > > > + INTEL_VGA_DEVICE(0x8A51, info), \
> > > > + INTEL_VGA_DEVICE(0x8A5C, info), \
> > > > + INTEL_VGA_DEVICE(0x8A5D, info), \
> > > > + INTEL_VGA_DEVICE(0x8A52, info), \
> > > > + INTEL_VGA_DEVICE(0x8A5A, info), \
> > > > + INTEL_VGA_DEVICE(0x8A5B, info), \
> > > > + INTEL_VGA_DEVICE(0x8A71, info), \
> > > > + INTEL_VGA_DEVICE(0x8A70, info)
> > > > +
> > > > #endif /* _I915_PCIIDS_H */
>
>
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next prev parent reply other threads:[~2018-01-10 14:09 UTC|newest]
Thread overview: 118+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-09 23:23 [PATCH 00/27] ICL basic enabling + GEM Paulo Zanoni
2018-01-09 23:23 ` [PATCH 01/27] drm/i915/icl: Add initial Icelake definitions Paulo Zanoni
2018-01-09 23:59 ` Oscar Mateo
2018-01-10 17:57 ` Paulo Zanoni
2018-01-10 18:08 ` Oscar Mateo
2018-01-10 18:22 ` Rodrigo Vivi
2018-01-10 18:38 ` Paulo Zanoni
2018-01-11 1:25 ` Rodrigo Vivi
2018-01-10 10:15 ` Chris Wilson
2018-01-10 18:19 ` Paulo Zanoni
2018-01-10 19:17 ` Paulo Zanoni
2018-01-19 11:27 ` Joonas Lahtinen
2018-01-09 23:23 ` [PATCH 02/27] drm/i915/icl: Add the ICL PCI IDs Paulo Zanoni
2018-01-10 0:09 ` Oscar Mateo
2018-01-10 1:02 ` De Marchi, Lucas
2018-01-10 1:07 ` Oscar Mateo
2018-01-10 14:08 ` Paulo Zanoni [this message]
2018-01-09 23:23 ` [PATCH 03/27] drm/i915/icl: add icelake_init_clock_gating() Paulo Zanoni
2018-01-10 9:39 ` Joonas Lahtinen
2018-01-10 18:42 ` Paulo Zanoni
2018-01-09 23:23 ` [PATCH 04/27] drm/i915/icl: Icelake interrupt register addresses and bits Paulo Zanoni
2018-01-10 19:54 ` Paulo Zanoni
2018-01-09 23:23 ` [PATCH 05/27] drm/i915/icl: Show interrupt registers in debugfs Paulo Zanoni
2018-01-10 9:02 ` Tvrtko Ursulin
2018-01-10 18:49 ` Paulo Zanoni
2018-01-11 8:55 ` Tvrtko Ursulin
2018-01-09 23:23 ` [PATCH 06/27] drm/i915/icl: Prepare for more rings Paulo Zanoni
2018-02-07 22:03 ` Oscar Mateo
2018-01-09 23:23 ` [PATCH 07/27] drm/i915/icl: Interrupt handling Paulo Zanoni
2018-01-10 10:16 ` Joonas Lahtinen
2018-01-10 18:56 ` Paulo Zanoni
2018-01-19 17:30 ` Tvrtko Ursulin
2018-01-19 18:10 ` Paulo Zanoni
2018-01-19 20:33 ` Chris Wilson
2018-01-26 11:22 ` Jani Nikula
2018-02-09 22:34 ` Daniele Ceraolo Spurio
2018-01-09 23:23 ` [PATCH 08/27] drm/i915/icl: Ringbuffer interrupt handling Paulo Zanoni
2018-01-10 10:12 ` Chris Wilson
2018-01-11 19:17 ` Daniele Ceraolo Spurio
2018-01-15 10:38 ` Tvrtko Ursulin
2018-02-01 23:58 ` Belgaumkar, Vinay
2018-02-02 0:36 ` Belgaumkar, Vinay
2018-01-09 23:23 ` [PATCH 09/27] drm/i915/icl: Correctly initialize the Gen11 engines Paulo Zanoni
2018-01-09 23:28 ` [PATCH 10/27] drm/i915/icl: Enhanced execution list support Paulo Zanoni
2018-01-09 23:28 ` [PATCH 11/27] drm/i915/icl: Gen11 render context size Paulo Zanoni
2018-01-11 1:21 ` Rodrigo Vivi
2018-01-11 18:20 ` Oscar Mateo
2018-01-11 18:23 ` [PATCH v3] " Oscar Mateo
2018-01-11 19:40 ` Rodrigo Vivi
2018-01-11 22:53 ` Oscar Mateo
2018-01-11 22:55 ` [PATCH 1/2] drm/i915: Return a default RCS " Oscar Mateo
2018-01-11 22:55 ` [PATCH 2/2 v4] drm/i915/icl: Gen11 render " Oscar Mateo
2018-01-12 0:01 ` Daniele Ceraolo Spurio
2018-01-11 23:08 ` [PATCH 1/2] drm/i915: Return a default RCS " Daniele Ceraolo Spurio
2018-01-09 23:28 ` [PATCH 12/27] drm/i915/icl: Add Indirect Context Offset for Gen11 Paulo Zanoni
2018-01-10 23:44 ` Oscar Mateo
2018-01-25 1:06 ` [PATCH v2 " Michel Thierry
2018-01-09 23:28 ` [PATCH 13/27] drm/i915/icl: Gen11 forcewake support Paulo Zanoni
2018-02-01 0:52 ` [PATCH v10] " Michel Thierry
2018-02-01 10:25 ` Tvrtko Ursulin
2018-02-01 16:02 ` Michel Thierry
2018-02-01 16:08 ` [PATCH v11] " Michel Thierry
2018-02-03 20:26 ` [PATCH v10] " kbuild test robot
2018-02-03 21:43 ` kbuild test robot
2018-01-09 23:28 ` [PATCH 14/27] drm/i915/icl: Set graphics mode register for gen11 Paulo Zanoni
2018-01-10 13:40 ` Arkadiusz Hiler
2018-01-11 19:32 ` Daniele Ceraolo Spurio
2018-01-19 19:30 ` [PATCH v3] " Kelvin Gardiner
2018-01-19 22:46 ` Daniele Ceraolo Spurio
2018-01-09 23:28 ` [PATCH 15/27] drm/i915/icl: new context descriptor support Paulo Zanoni
2018-01-09 23:28 ` [PATCH 16/27] drm/i915/icl: Check for fused-off VDBOX and VEBOX instances Paulo Zanoni
2018-01-10 9:36 ` Chris Wilson
2018-01-10 19:25 ` Oscar Mateo
2018-01-10 19:32 ` Chris Wilson
2018-01-10 19:33 ` Chris Wilson
2018-01-10 23:02 ` Oscar Mateo
2018-01-10 23:03 ` [PATCH v8] " Oscar Mateo
2018-01-09 23:28 ` [PATCH 17/27] drm/i915/icl: Enable the extra video decode and enhancement boxes for Icelake 11 Paulo Zanoni
2018-01-09 23:28 ` [PATCH 18/27] drm/i915/icl: Update subslice define for ICL 11 Paulo Zanoni
2018-01-11 0:06 ` Oscar Mateo
2018-01-11 18:25 ` [PATCH v2] " Oscar Mateo
2018-02-08 16:35 ` Lionel Landwerlin
2018-02-09 17:44 ` Oscar Mateo
2018-02-09 17:48 ` Lionel Landwerlin
2018-02-09 18:00 ` [PATCH v3] " Oscar Mateo
2018-01-09 23:28 ` [PATCH 19/27] drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection Paulo Zanoni
2018-01-10 12:02 ` Tvrtko Ursulin
2018-01-09 23:28 ` [PATCH 20/27] drm/i915/icl: Make use of the SW counter field in the new context descriptor Paulo Zanoni
2018-01-11 21:10 ` Daniele Ceraolo Spurio
2018-01-11 22:37 ` Oscar Mateo
2018-01-11 23:11 ` Daniele Ceraolo Spurio
2018-01-09 23:28 ` [PATCH 21/27] drm/i915/icl: Add reset control register changes Paulo Zanoni
2018-01-09 23:28 ` [PATCH 22/27] drm/i915/icl: Add configuring MOCS in new Icelake engines Paulo Zanoni
2018-01-09 23:28 ` [PATCH 23/27] drm/i915/icl: Split out the servicing of the Selector and Shared IIR registers Paulo Zanoni
2018-01-09 23:28 ` [PATCH 24/27] drm/i915/icl: Handle RPS interrupts correctly for Gen11 Paulo Zanoni
2018-01-09 23:28 ` [PATCH 25/27] drm/i915/icl: Enable RC6 and RPS in Gen11 Paulo Zanoni
2018-01-09 23:28 ` [PATCH 26/27] drm/i915/icl: allow the reg_read ioctl to read the RCS TIMESTAMP register Paulo Zanoni
2018-01-11 1:19 ` Rodrigo Vivi
2018-01-09 23:28 ` [PATCH 27/27] drm/i915/gen11: add support for reading the timestamp frequency Paulo Zanoni
2018-03-28 11:34 ` Lionel Landwerlin
2018-01-10 9:45 ` [PATCH 10/27] drm/i915/icl: Enhanced execution list support Chris Wilson
2018-01-11 19:55 ` Daniele Ceraolo Spurio
2018-01-11 20:55 ` Daniele Ceraolo Spurio
2018-01-17 21:53 ` [PATCH v5] " Daniele Ceraolo Spurio
2018-01-19 13:05 ` Mika Kuoppala
2018-01-19 16:15 ` Daniele Ceraolo Spurio
2018-01-22 15:08 ` Mika Kuoppala
2018-01-22 15:13 ` Chris Wilson
2018-01-22 16:09 ` Daniele Ceraolo Spurio
2018-01-22 17:32 ` Chris Wilson
2018-01-22 21:38 ` Daniele Ceraolo Spurio
2018-01-11 1:32 ` [PATCH 00/27] ICL basic enabling + GEM Rodrigo Vivi
2018-01-19 11:45 ` Joonas Lahtinen
2018-01-19 11:55 ` Tvrtko Ursulin
2018-01-19 13:14 ` Mika Kuoppala
2018-01-19 12:08 ` Jani Nikula
2018-01-12 10:06 ` ✗ Fi.CI.BAT: failure for ICL basic enabling + GEM (rev24) Patchwork
2018-01-18 10:21 ` ✗ Fi.CI.BAT: failure for ICL basic enabling + GEM (rev25) Patchwork
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