From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vidya Srinivas Subject: [PATCH 07/15] drm/i915/skl+: make sure higher latency level has higher wm value Date: Mon, 15 Jan 2018 03:18:17 +0000 (UTC) Message-ID: <1516484713-5837-8-git-send-email-vidya.srinivas@intel.com> References: <1516484713-5837-1-git-send-email-vidya.srinivas@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5E4DE6E063 for ; Mon, 15 Jan 2018 03:20:09 +0000 (UTC) Date: Sun, 21 Jan 2018 03:15:05 +0530 In-Reply-To: <1516484713-5837-1-git-send-email-vidya.srinivas@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org RnJvbTogTWFoZXNoIEt1bWFyIDxtYWhlc2gxLmt1bWFyQGludGVsLmNvbT4KCkREQiBhbGxvY2F0 aW9uIG9wdGltaXphdGlvbiBhbGdvcml0aG0gcmVxdWlyZXMvYXNzdW1lcyBkZGIgYWxsb2NhdGlv biBmb3IKYW55IG1lbW9yeSBDLXN0YXRlIGxldmVsIEREQiB2YWx1ZSB0byBiZSBhcyBoaWdoIGFz IGxldmVsIGJlbG93LgpSZW5kZXIgZGVjb21wcmVzc2lvbiByZXF1aXJlcyBsZXZlbCBXTSB0byBi ZSBhcyBoaWdoIGFzIHdtIGxldmVsLTAuClRoaXMgcGF0Y2ggZnVsZmlscyBib3RoIHRoZSByZXF1 aXJlbWVudHMuCgpTaWduZWQtb2ZmLWJ5OiBNYWhlc2ggS3VtYXIgPG1haGVzaDEua3VtYXJAaW50 ZWwuY29tPgotLS0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BtLmMgfCAxOCArKysrKysr KysrKysrKysrKysKIDEgZmlsZSBjaGFuZ2VkLCAxOCBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0 IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1 L2ludGVsX3BtLmMKaW5kZXggNTgwMGI1Yi4uOWVkNTA3YSAxMDA2NDQKLS0tIGEvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfcG0uYworKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9w bS5jCkBAIC00NTE0LDYgKzQ1MTQsNyBAQCBzdGF0aWMgaW50IHNrbF9jb21wdXRlX3BsYW5lX3dt KGNvbnN0IHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiwKIAkJCQl1aW50MTZfdCBk ZGJfYWxsb2NhdGlvbiwKIAkJCQlpbnQgbGV2ZWwsCiAJCQkJY29uc3Qgc3RydWN0IHNrbF93bV9w YXJhbXMgKndwLAorCQkJCWNvbnN0IHN0cnVjdCBza2xfd21fbGV2ZWwgKnJlc3VsdF9wcmV2LAog CQkJCXN0cnVjdCBza2xfd21fbGV2ZWwgKnJlc3VsdCAvKiBvdXQgKi8pCiB7CiAJY29uc3Qgc3Ry dWN0IGRybV9wbGFuZV9zdGF0ZSAqcHN0YXRlID0gJmludGVsX3BzdGF0ZS0+YmFzZTsKQEAgLTQ1 NzksNiArNDU4MCwxNSBAQCBzdGF0aWMgaW50IHNrbF9jb21wdXRlX3BsYW5lX3dtKGNvbnN0IHN0 cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdiwKIAkJfSBlbHNlIHsKIAkJCXJlc19ibG9j a3MrKzsKIAkJfQorCisJCS8qCisJCSAqIE1ha2Ugc3VyZSByZXN1bHQgYmxvY2tzIGZvciBoaWdo ZXIgbGF0ZW5jeSBsZXZlbHMgYXJlIGF0bGVhc3QKKwkJICogYXMgaGlnaCBhcyBsZXZlbCBiZWxv dy4KKwkJICogQXNzdW1wdGlvbiBpbiBEREIgYWxnb3JpdGhtIG9wdGltaXphdGlvbiBmb3Igc3Bl Y2lhbCBjYXNlcy4KKwkJICogQWxzbyBjb3ZlcnMgRGlzcGxheSBXQSAjMTEyNSBmb3IgUkMuCisJ CSAqLworCQlpZiAocmVzdWx0X3ByZXYtPnBsYW5lX3Jlc19iID4gcmVzX2Jsb2NrcykKKwkJCXJl c19ibG9ja3MgPSByZXN1bHRfcHJldi0+cGxhbmVfcmVzX2I7CiAJfQogCiAJaWYgKHJlc19ibG9j a3MgPj0gZGRiX2FsbG9jYXRpb24gfHwgcmVzX2xpbmVzID4gMzEpIHsKQEAgLTQ2MzcsNiArNDY0 NywxMyBAQCBza2xfY29tcHV0ZV93bV9sZXZlbHMoY29uc3Qgc3RydWN0IGRybV9pOTE1X3ByaXZh dGUgKmRldl9wcml2LAogCWZvciAobGV2ZWwgPSAwOyBsZXZlbCA8PSBtYXhfbGV2ZWw7IGxldmVs KyspIHsKIAkJc3RydWN0IHNrbF93bV9sZXZlbCAqcmVzdWx0ID0gcGxhbmVfbnVtID8gJndtLT51 dl93bVtsZXZlbF0gOgogCQkJCQkJCSAgJndtLT53bVtsZXZlbF07CisJCXN0cnVjdCBza2xfd21f bGV2ZWwgKnJlc3VsdF9wcmV2OworCisJCWlmIChsZXZlbCkKKwkJCXJlc3VsdF9wcmV2ID0gcGxh bmVfbnVtID8gJndtLT51dl93bVtsZXZlbCAtIDFdIDoKKwkJCQkJCSAgJndtLT53bVtsZXZlbCAt IDFdOworCQllbHNlCisJCQlyZXN1bHRfcHJldiA9IHBsYW5lX251bSA/ICZ3bS0+dXZfd21bMF0g OiAmd20tPndtWzBdOwogCiAJCXJldCA9IHNrbF9jb21wdXRlX3BsYW5lX3dtKGRldl9wcml2LAog CQkJCQkgICBjc3RhdGUsCkBAIC00NjQ0LDYgKzQ2NjEsNyBAQCBza2xfY29tcHV0ZV93bV9sZXZl bHMoY29uc3Qgc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2LAogCQkJCQkgICBkZGJf YmxvY2tzLAogCQkJCQkgICBsZXZlbCwKIAkJCQkJICAgd21fcGFyYW1zLAorCQkJCQkgICByZXN1 bHRfcHJldiwKIAkJCQkJICAgcmVzdWx0KTsKIAkJaWYgKHJldCkKIAkJCXJldHVybiByZXQ7Ci0t IAoyLjcuNAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K SW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0 dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==