From mboxrd@z Thu Jan 1 00:00:00 1970 From: Manasi Navare Subject: [PATCH 2/2] drm/dp: Add definitions for TPS4 bits and macros to check the support Date: Mon, 22 Jan 2018 14:43:11 -0800 Message-ID: <1516660991-20697-2-git-send-email-manasi.d.navare@intel.com> References: <1516660991-20697-1-git-send-email-manasi.d.navare@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1516660991-20697-1-git-send-email-manasi.d.navare@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org, Rodrigo Vivi List-Id: intel-gfx@lists.freedesktop.org RFAgMS40IHNwZWMgYWRkcyBhIFRQUzQgdHJhaW5pbmcgcGF0dGVybiBzZXF1ZW5jZSByZXF1aXJl ZCBmb3IKSEJSMy4gVGhpcyBwYXRjaCBhZGRzIHRoZSBjb3JyZXNwb25kaW5nIGJpdCBkZWZpbml0 aW9ucyBpbgpNQVhfRE9XTlNQUkVBRCByZWdpc3RlciBhbmQgVFJBSU5JTkdfUEFUVEVSTl9TRVQg YW5kCmlubGluZSBmdW5jdGlvbnMgdG8gY2hlY2sgaWYgdGhpcyBiaXQgaXMgc2V0IGFuZCBmb3Ig c2VsZWN0aW5nCmEgcHJvcGVyIFRSQUlOSU5HX1BBVFRFUk5fTUFTSyB0aGF0IGNoYW5nZWQgdG8g MHg3IG9uCkRQIHNwZWMgMS40CgpDYzogUm9kcmlnbyBWaXZpIDxyb2RyaWdvLnZpdmlAaW50ZWwu Y29tPgpDYzogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGxpbnV4LmludGVsLmNvbT4KQ2M6IGRy aS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKU2lnbmVkLW9mZi1ieTogTWFuYXNpIE5hdmFy ZSA8bWFuYXNpLmQubmF2YXJlQGludGVsLmNvbT4KLS0tCiBpbmNsdWRlL2RybS9kcm1fZHBfaGVs cGVyLmggfCAxNyArKysrKysrKysrKysrKysrKwogMSBmaWxlIGNoYW5nZWQsIDE3IGluc2VydGlv bnMoKykKCmRpZmYgLS1naXQgYS9pbmNsdWRlL2RybS9kcm1fZHBfaGVscGVyLmggYi9pbmNsdWRl L2RybS9kcm1fZHBfaGVscGVyLmgKaW5kZXggYzgwZmE5Mi4uYzIzOWU2ZSAxMDA2NDQKLS0tIGEv aW5jbHVkZS9kcm0vZHJtX2RwX2hlbHBlci5oCisrKyBiL2luY2x1ZGUvZHJtL2RybV9kcF9oZWxw ZXIuaApAQCAtNzUsNiArNzUsNyBAQAogI2RlZmluZSBEUF9NQVhfRE9XTlNQUkVBRCAgICAgICAg ICAgICAgICAgICAweDAwMwogIyBkZWZpbmUgRFBfTUFYX0RPV05TUFJFQURfMF81CQkgICAgKDEg PDwgMCkKICMgZGVmaW5lIERQX05PX0FVWF9IQU5EU0hBS0VfTElOS19UUkFJTklORyAgKDEgPDwg NikKKyMgZGVmaW5lIERQX1RQUzRfU1VQUE9SVEVEICAgICAgICAgICAgICAgICAgKDEgPDwgNykK IAogI2RlZmluZSBEUF9OT1JQICAgICAgICAgICAgICAgICAgICAgICAgICAgICAweDAwNAogCkBA IC0zNDUsNyArMzQ2LDkgQEAKICMgZGVmaW5lIERQX1RSQUlOSU5HX1BBVFRFUk5fMQkJICAgIDEK ICMgZGVmaW5lIERQX1RSQUlOSU5HX1BBVFRFUk5fMgkJICAgIDIKICMgZGVmaW5lIERQX1RSQUlO SU5HX1BBVFRFUk5fMwkJICAgIDMJICAgIC8qIDEuMiAqLworIyBkZWZpbmUgRFBfVFJBSU5JTkdf UEFUVEVSTl80ICAgICAgICAgICAgICA3ICAgICAgIC8qIDEuNCAqLwogIyBkZWZpbmUgRFBfVFJB SU5JTkdfUEFUVEVSTl9NQVNLCSAgICAweDMKKyMgZGVmaW5lIERQX1RSQUlOSU5HX1BBVFRFUk5f TUFTS18xXzQJICAgIDB4ZgogCiAvKiBEUENEIDEuMSBvbmx5LiBGb3IgRFBDRCA+PSAxLjIgc2Vl IHBlci1sYW5lIERQX0xJTktfUVVBTF9MQU5Fbl9TRVQgKi8KICMgZGVmaW5lIERQX0xJTktfUVVB TF9QQVRURVJOXzExX0RJU0FCTEUgICAgKDAgPDwgMikKQEAgLTk4OSw2ICs5OTIsMjAgQEAgZHJt X2RwX3RwczNfc3VwcG9ydGVkKGNvbnN0IHU4IGRwY2RbRFBfUkVDRUlWRVJfQ0FQX1NJWkVdKQog fQogCiBzdGF0aWMgaW5saW5lIGJvb2wKK2RybV9kcF90cHM0X3N1cHBvcnRlZChjb25zdCB1OCBk cGNkW0RQX1JFQ0VJVkVSX0NBUF9TSVpFXSkKK3sKKwlyZXR1cm4gZHBjZFtEUF9EUENEX1JFVl0g Pj0gMHgxNCAmJgorCQlkcGNkW0RQX01BWF9ET1dOU1BSRUFEXSAmIERQX1RQUzRfU1VQUE9SVEVE OworfQorCitzdGF0aWMgaW5saW5lIHU4Citkcm1fZHBfdHJhaW5pbmdfcGF0dGVybl9tYXNrKGNv bnN0IHU4IGRwY2RbRFBfUkVDRUlWRVJfQ0FQX1NJWkVdKQoreworCXJldHVybiAoZHBjZFtEUF9E UENEX1JFVl0gPj0gMHgxNCkgPyBEUF9UUkFJTklOR19QQVRURVJOX01BU0tfMV80IDoKKwkJRFBf VFJBSU5JTkdfUEFUVEVSTl9NQVNLOworfQorCitzdGF0aWMgaW5saW5lIGJvb2wKIGRybV9kcF9p c19icmFuY2goY29uc3QgdTggZHBjZFtEUF9SRUNFSVZFUl9DQVBfU0laRV0pCiB7CiAJcmV0dXJu IGRwY2RbRFBfRE9XTlNUUkVBTVBPUlRfUFJFU0VOVF0gJiBEUF9EV05fU1RSTV9QT1JUX1BSRVNF TlQ7Ci0tIAoyLjcuNAoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Au b3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwt Z2Z4Cg==