Re: [PATCH 08/17] drm/i915/icl: NV12 y-plane ddb is not in same plane

James Ausmus
2018-01-25T22:28:51Z

On Tue, Jan 23, 2018 at 05:05:27PM -0200, Paulo Zanoni wrote:
> From: Mahesh Kumar <mahesh1.kumar@intel.com>
>
> We don't have planar pixel format support implemented for ICL yet.
> ICL require 2 display planes to be allocated for Planar formats unlike
> previous GEN. So ICL/GEN11 doesn't require to write Y-plane ddb data in
> NV12_BUF_CFG register and PLANE_NV12_BUF_CFG register is removed in ICL.
>
> This patch removes the PLANE_NV12_BUF_CFG write for ICL.
>
> Changes Since V1:
> - Improve commit message as per Paulo's comment
>
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Reviewed-by: James Ausmus <james.ausmus@intel.com>

> ---
> drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c6d31a5075ad..0237362ccf83 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4832,8 +4832,10 @@ static void skl_write_plane_wm(struct intel_crtc *intel_crtc,
>
> skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
> &ddb->plane[pipe][plane_id]);
> - skl_ddb_entry_write(dev_priv, PLANE_NV12_BUF_CFG(pipe, plane_id),
> - &ddb->y_plane[pipe][plane_id]);
> + if (INTEL_GEN(dev_priv) < 11)
> + skl_ddb_entry_write(dev_priv,
> + PLANE_NV12_BUF_CFG(pipe, plane_id),
> + &ddb->y_plane[pipe][plane_id]);
> }
>
> static void skl_write_cursor_wm(struct intel_crtc *intel_crtc,
> --
> 2.14.3
>
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