[PATCH 15/17] drm/i915/gen11: fix the SAGV block time for gen11

Paulo Zanoni
2018-01-23T19:06:08Z

It's 10us for gen 11.

Reviewed-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 84a5b13fdee2..1edd1445ab5b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3711,11 +3711,18 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
struct intel_crtc_state *cstate;
enum pipe pipe;
int level, latency;
- int sagv_block_time_us = IS_GEN9(dev_priv) ? 30 : 20;
+ int sagv_block_time_us;

if (!intel_has_sagv(dev_priv))
return false;

+ if (IS_GEN9(dev_priv))
+ sagv_block_time_us = 30;
+ else if (IS_GEN10(dev_priv))
+ sagv_block_time_us = 20;
+ else
+ sagv_block_time_us = 10;
+
/*
* SKL+ workaround: bspec recommends we disable the SAGV when we have
* more then one pipe enabled
--
2.14.3