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From: Vidya Srinivas <vidya.srinivas@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Vidya Srinivas <vidya.srinivas@intel.com>
Subject: [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func
Date: Tue, 13 Feb 2018 15:22:04 +0530	[thread overview]
Message-ID: <1518515534-12972-7-git-send-email-vidya.srinivas@intel.com> (raw)
In-Reply-To: <1518515534-12972-1-git-send-email-vidya.srinivas@intel.com>

From: Mahesh Kumar <mahesh1.kumar@intel.com>

This patch passes skl_wm_level structure itself to watermark
computation function skl_compute_plane_wm function (instead
of its internal parameters). It reduces number of arguments
required to be passed.

v2: Addressed review comments by Shashank Sharma

Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 18 +++++++-----------
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a77d572..414832a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4532,9 +4532,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 				uint16_t ddb_allocation,
 				int level,
 				const struct skl_wm_params *wp,
-				uint16_t *out_blocks, /* out */
-				uint8_t *out_lines, /* out */
-				bool *enabled /* out */)
+				struct skl_wm_level *result /* out */)
 {
 	const struct drm_plane_state *pstate = &intel_pstate->base;
 	uint32_t latency = dev_priv->wm.skl_latency[level];
@@ -4548,7 +4546,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 
 	if (latency == 0 ||
 	    !intel_wm_plane_visible(cstate, intel_pstate)) {
-		*enabled = false;
+		result->plane_en = false;
 		return 0;
 	}
 
@@ -4629,7 +4627,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 	if ((level > 0 && res_lines > 31) ||
 	    res_blocks >= ddb_allocation ||
 	    min_disp_buf_needed >= ddb_allocation) {
-		*enabled = false;
+		result->plane_en = false;
 
 		/*
 		 * If there are no valid level 0 watermarks, then we can't
@@ -4649,9 +4647,9 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
 	}
 
 	/* The number of lines are ignored for the level 0 watermark. */
-	*out_lines = level ? res_lines : 0;
-	*out_blocks = res_blocks;
-	*enabled = true;
+	result->plane_res_b = res_blocks;
+	result->plane_res_l = res_lines;
+	result->plane_en = true;
 
 	return 0;
 }
@@ -4690,9 +4688,7 @@ skl_compute_wm_levels(const struct drm_i915_private *dev_priv,
 					   ddb_blocks,
 					   level,
 					   wm_params,
-					   &result->plane_res_b,
-					   &result->plane_res_l,
-					   &result->plane_en);
+					   result);
 		if (ret)
 			return ret;
 	}
-- 
2.7.4

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  parent reply	other threads:[~2018-02-13  9:54 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-13  9:51 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-13  9:51 ` [PATCH 01/16] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2018-02-13  9:52 ` [PATCH 02/16] drm/i915/skl+: refactor WM calculation for NV12 Vidya Srinivas
2018-02-13  9:52 ` [PATCH 03/16] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-02-13 10:35   ` Mika Kahola
2018-02-21  3:10     ` Srinivas, Vidya
2018-02-13  9:52 ` [PATCH 04/16] drm/i915/skl+: support verification of DDB HW state for NV12 Vidya Srinivas
2018-02-13  9:52 ` [PATCH 05/16] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-02-13  9:52 ` Vidya Srinivas [this message]
2018-02-13  9:52 ` [PATCH 07/16] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-02-13  9:52 ` [PATCH 08/16] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-02-13  9:52 ` [PATCH 09/16] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-02-13  9:52 ` [PATCH 10/16] drm/i915: Set scaler mode for NV12 Vidya Srinivas
2018-02-13  9:52 ` [PATCH 11/16] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-02-13  9:52 ` [PATCH 12/16] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-02-13  9:52 ` [PATCH 13/16] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-02-13  9:52 ` [PATCH 14/16] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-02-13  9:52 ` [PATCH 15/16] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-02-13  9:52 ` [PATCH 16/16] drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg Vidya Srinivas
2018-02-13 10:20 ` ✗ Fi.CI.BAT: failure for Adding NV12 support (rev9) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-02-21 10:20 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-21 10:20 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-02-15  2:39 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-15  2:39 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-02-14  4:57 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-14  4:57 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-02-06 13:02 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-06 13:02 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-02-06 12:58 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-02-06 12:58 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-02-07 16:46   ` Sharma, Shashank
2018-01-22 12:03 [PATCH 00/16] Adding NV12 support Vidya Srinivas
2018-01-22 12:03 ` [PATCH 06/16] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas

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