From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Lucas De Marchi <lucas.de.marchi@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 18/24] drm/i915/icl: implement icl_digital_port_connected()
Date: Wed, 20 Jun 2018 14:01:07 -0700 [thread overview]
Message-ID: <1529528467.27176.2.camel@intel.com> (raw)
In-Reply-To: <20180619222845.GA32266@ldmartin-desk.amr.corp.intel.com>
Em Ter, 2018-06-19 às 15:28 -0700, Lucas De Marchi escreveu:
> On Mon, May 21, 2018 at 05:25:52PM -0700, Paulo Zanoni wrote:
> > Do like the other functions and check for the ISR bits. We have
> > plans
> > to add a few more checks in this code in the next patches, that's
> > why
> > it's a little more verbose than it could be.
> >
> > Cc: Animesh Manna <animesh.manna@intel.com>
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_reg.h | 5 ++++
> > drivers/gpu/drm/i915/intel_dp.c | 57
> > +++++++++++++++++++++++++++++++++++++++++
> > 2 files changed, 62 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 49a72320e794..24308d4435f5 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -7055,6 +7055,7 @@ enum {
> > #define GEN11_TC3_HOTPLUG (1 << 18)
> > #define GEN11_TC2_HOTPLUG (1 << 17)
> > #define GEN11_TC1_HOTPLUG (1 << 16)
> > +#define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port)
> > + 16))
> > #define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC4_HOTPLU
> > G | \
> > GEN11_TC3_HOTPLUG
> > | \
> > GEN11_TC2_HOTPLUG
> > | \
> > @@ -7063,6 +7064,7 @@ enum {
> > #define GEN11_TBT3_HOTPLUG (1 << 2)
> > #define GEN11_TBT2_HOTPLUG (1 << 1)
> > #define GEN11_TBT1_HOTPLUG (1 << 0)
> > +#define GEN11_TBT_HOTPLUG(tc_port) (1 <<
> > (tc_port))
> > #define GEN11_DE_TBT_HOTPLUG_MASK (GEN11_TBT4_HOTP
> > LUG | \
> > GEN11_TBT3_HOTPLU
> > G | \
> > GEN11_TBT2_HOTPLU
> > G | \
> > @@ -7486,6 +7488,9 @@ enum {
> > #define ICP_GMBUS (1 << 23)
> > #define ICP_DDIB_HOTPLUG (1 << 17)
> > #define ICP_DDIA_HOTPLUG (1 << 16)
> > +#define ICP_TC_HOTPLUG(tc_port) (1 << ((tc_port) +
> > 24))
> > +#define ICP_DDI_HOTPLUG(port) (1 << ((port) + 16))
> > +
> >
> > #define ICP_SDE_DDI_MASK (ICP_DDIB_HOTPLUG |
> > \
> > ICP_DDIA_HOTPLUG)
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 102070940095..b477124717e7 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -4722,6 +4722,61 @@ static bool
> > bxt_digital_port_connected(struct intel_encoder *encoder)
> > return I915_READ(GEN8_DE_PORT_ISR) & bit;
> > }
> >
> > +static bool icl_combo_port_connected(struct drm_i915_private
> > *dev_priv,
> > + struct intel_digital_port
> > *intel_dig_port)
> > +{
> > + enum port port = intel_dig_port->base.port;
> > +
> > + return I915_READ(ICP_SDE_ISR) & ICP_DDI_HOTPLUG(port);
> > +}
> > +
> > +static bool icl_tc_port_connected(struct drm_i915_private
> > *dev_priv,
> > + struct intel_digital_port
> > *intel_dig_port)
> > +{
> > + enum port port = intel_dig_port->base.port;
> > + enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
> > + u32 legacy_bit = ICP_TC_HOTPLUG(tc_port);
> > + u32 typec_bit = GEN11_TC_HOTPLUG(tc_port);
> > + u32 tbt_bit = GEN11_TBT_HOTPLUG(tc_port);
> > + bool is_legacy = false, is_typec = false, is_tbt = false;
> > + u32 cpu_isr;
>
> why *cpu*_isr? hpd_isr, isr or val would be better IMO
Because we have 2 ISR registers we check, one is on the CPU and the
other is on the PCH. We just don't have a variable for pch_isr because
we don't need. Jusc alling it "isr" or "hpd_isr" would be misleading.
>
> > +
> > + if (I915_READ(ICP_SDE_ISR) & legacy_bit)
> > + is_legacy = true;
> > +
> > + cpu_isr = I915_READ(GEN11_DE_HPD_ISR);
> > + if (cpu_isr & typec_bit)
> > + is_typec = true;
> > + if (cpu_isr & tbt_bit)
> > + is_tbt = true;
> > +
> > + WARN_ON(is_legacy + is_typec + is_tbt > 1);
> > + if (!is_legacy && !is_typec && !is_tbt)
> > + return false;
> > +
> > + return true;
>
> you know you could "return is_legacy + is_typec + is_tbt;", right?
> you
> are already doing it above, it may make sense to remove the extra
> branch. Or not.
Because the next patch adds code between the "return false" and the
last return, so I'd have to change it there.
>
> Feel free to disagree and push.
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Thanks,
Paulo
>
>
> Lucas De Marchi
>
> > +}
> > +
> > +static bool icl_digital_port_connected(struct intel_encoder
> > *encoder)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(encoder-
> > >base.dev);
> > + struct intel_digital_port *dig_port =
> > enc_to_dig_port(&encoder->base);
> > +
> > + switch (encoder->hpd_pin) {
> > + case HPD_PORT_A:
> > + case HPD_PORT_B:
> > + return icl_combo_port_connected(dev_priv,
> > dig_port);
> > + case HPD_PORT_C:
> > + case HPD_PORT_D:
> > + case HPD_PORT_E:
> > + case HPD_PORT_F:
> > + return icl_tc_port_connected(dev_priv, dig_port);
> > + default:
> > + MISSING_CASE(encoder->hpd_pin);
> > + return false;
> > + }
> > +}
> > +
> > /*
> > * intel_digital_port_connected - is the specified port connected?
> > * @encoder: intel_encoder
> > @@ -4749,6 +4804,8 @@ bool intel_digital_port_connected(struct
> > intel_encoder *encoder)
> > return bdw_digital_port_connected(encoder);
> > else if (IS_GEN9_LP(dev_priv))
> > return bxt_digital_port_connected(encoder);
> > + else if (IS_ICELAKE(dev_priv))
> > + return icl_digital_port_connected(encoder);
> > else
> > return spt_digital_port_connected(encoder);
> > }
> > --
> > 2.14.3
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-06-20 21:01 UTC|newest]
Thread overview: 127+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-22 0:25 [PATCH 00/24] More ICL display patches Paulo Zanoni
2018-05-22 0:25 ` [PATCH 01/24] drm/i915/icl: Extend AUX F interrupts to ICL Paulo Zanoni
2018-05-23 19:02 ` Srivatsa, Anusha
2018-05-22 0:25 ` [PATCH 02/24] drm/i915/icl: GSE interrupt moves from DE_MISC to GU_MISC Paulo Zanoni
2018-05-24 9:22 ` Mika Kuoppala
2018-05-24 22:51 ` Dhinakaran Pandiyan
2018-05-25 12:00 ` Mika Kuoppala
2018-05-25 19:43 ` [PATCH v2] " Dhinakaran Pandiyan
2018-05-25 19:56 ` Chris Wilson
2018-06-14 1:51 ` Dhinakaran Pandiyan
2018-06-14 10:32 ` Ville Syrjälä
2018-06-14 20:21 ` Dhinakaran Pandiyan
2018-06-14 19:54 ` [PATCH v3] " Dhinakaran Pandiyan
2018-06-15 23:18 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 03/24] drm/i915/icl: introduce tc_port Paulo Zanoni
2018-05-22 6:13 ` Kumar, Mahesh
2018-05-22 0:25 ` [PATCH 04/24] drm/i915/icl: Support for TC North Display interrupts Paulo Zanoni
2018-06-13 22:20 ` Lucas De Marchi
2018-06-15 23:47 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 05/24] drm/i915/icp: Add Interrupt Support Paulo Zanoni
2018-05-24 23:53 ` Lucas De Marchi
2018-05-25 0:45 ` Dhinakaran Pandiyan
2018-05-25 0:43 ` Lucas De Marchi
2018-05-30 0:04 ` Lucas De Marchi
2018-06-13 22:23 ` Lucas De Marchi
2018-06-14 0:04 ` Paulo Zanoni
2018-06-14 2:21 ` Dhinakaran Pandiyan
2018-06-18 19:10 ` Anusha Srivatsa
2018-05-22 0:25 ` [PATCH 06/24] drm/i915/ICL: Add register definition for DFLEXDPMLE Paulo Zanoni
2018-05-25 0:26 ` Paulo Zanoni
2018-05-25 16:14 ` Lucas De Marchi
2018-05-25 16:58 ` Manasi Navare
2018-05-25 18:52 ` [PATCH v2 " Manasi Navare
2018-05-25 19:03 ` [PATCH v3 06/24] drm/i915/icl: " Manasi Navare
2018-05-22 0:25 ` [PATCH 07/24] drm/i915/icl: Add DDI HDMI level selection for ICL Paulo Zanoni
2018-05-25 16:26 ` Lucas De Marchi
2018-06-01 22:32 ` Paulo Zanoni
2018-06-11 23:51 ` Lucas De Marchi
2018-05-22 0:25 ` [PATCH 08/24] drm/i915/icl: Map VBT DDC Pin to BSpec DDC Pin Paulo Zanoni
2018-05-23 19:43 ` James Ausmus
2018-05-22 0:25 ` [PATCH 09/24] drm/i915/icl: Add Icelake PCH detection Paulo Zanoni
2018-05-25 0:29 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 10/24] drm/i915/icl: add icelake_get_ddi_pll() Paulo Zanoni
2018-06-13 23:15 ` Lucas De Marchi
2018-06-13 23:51 ` Paulo Zanoni
2018-06-13 23:55 ` Lucas De Marchi
2018-05-22 0:25 ` [PATCH 11/24] drm/i915/icl: Get DDI clock for ICL based on PLLs Paulo Zanoni
2018-05-22 11:44 ` Mika Kahola
2018-05-23 5:48 ` Lucas De Marchi
2018-05-23 21:54 ` Paulo Zanoni
2018-05-23 21:15 ` Paulo Zanoni
2018-05-23 22:44 ` [PATCH v2 " Paulo Zanoni
2018-05-24 13:12 ` Mika Kahola
2018-05-22 0:25 ` [PATCH 12/24] drm/i915/icl: Calculate link clock using the new registers Paulo Zanoni
2018-05-25 0:33 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 13/24] drm/i915/icl: unconditionally init DDI for every port Paulo Zanoni
2018-06-13 23:34 ` Lucas De Marchi
2018-06-13 23:47 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 14/24] drm/i915/icl: start adding the TBT pll Paulo Zanoni
2018-06-14 0:37 ` Lucas De Marchi
2018-05-22 0:25 ` [PATCH 15/24] drm/i915/icl: compute the TBT PLL registers Paulo Zanoni
2018-06-08 20:19 ` Srivatsa, Anusha
2018-06-13 21:19 ` Paulo Zanoni
2018-06-18 19:57 ` Srivatsa, Anusha
2018-06-13 21:42 ` [PATCH v2 " Paulo Zanoni
2018-05-22 0:25 ` [PATCH 16/24] drm/i915/icl: Handle hotplug interrupts for DP over TBT Paulo Zanoni
2018-06-14 0:51 ` Lucas De Marchi
2018-05-22 0:25 ` [PATCH 17/24] drm/i915/icl: Add 10-bit support for hdmi Paulo Zanoni
2018-06-20 16:55 ` Ville Syrjälä
2018-05-22 0:25 ` [PATCH 18/24] drm/i915/icl: implement icl_digital_port_connected() Paulo Zanoni
2018-06-19 22:28 ` Lucas De Marchi
2018-06-20 21:01 ` Paulo Zanoni [this message]
2018-05-22 0:25 ` [PATCH 19/24] drm/i915/icl: store the port type for TC ports Paulo Zanoni
2018-06-14 19:59 ` Rodrigo Vivi
2018-06-21 0:37 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 20/24] drm/i915/icl: implement the tc/legacy HPD {dis, }connect flow for DP Paulo Zanoni
2018-06-21 22:04 ` Srivatsa, Anusha
2018-07-11 21:28 ` Paulo Zanoni
2018-05-22 0:25 ` [PATCH 21/24] drm/i915/icl: implement the legacy HPD {dis, }connect flow for HDMI Paulo Zanoni
2018-06-26 11:41 ` Mika Kahola
2018-05-22 0:25 ` [PATCH 22/24] drm/i915/icl: Update FIA supported lane count for hpd Paulo Zanoni
2018-06-21 22:45 ` Srivatsa, Anusha
2018-05-22 0:25 ` [PATCH 23/24] drm/i915/icl: program MG_DP_MODE Paulo Zanoni
2018-06-19 12:59 ` Maarten Lankhorst
2018-06-19 13:00 ` Maarten Lankhorst
2018-05-22 0:25 ` [PATCH 24/24] drm/i915/icl: toggle PHY clock gating around link training Paulo Zanoni
2018-06-19 13:22 ` Maarten Lankhorst
2018-05-22 0:38 ` ✗ Fi.CI.CHECKPATCH: warning for More ICL display patches Patchwork
2018-05-22 0:45 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-05-22 1:00 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-22 1:52 ` ✓ Fi.CI.IGT: " Patchwork
2018-05-23 22:59 ` ✗ Fi.CI.CHECKPATCH: warning for More ICL display patches (rev2) Patchwork
2018-05-23 23:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-05-23 23:19 ` ✓ Fi.CI.BAT: success " Patchwork
2018-05-24 0:54 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-05-24 23:42 ` [PATCH 25/24] drm/i915/icl: fix gmbus gpio pin mapping Paulo Zanoni
2018-05-24 23:42 ` [PATCH 26/24] drm/i915/icl: Add allowed DP rates for Icelake Paulo Zanoni
2018-05-25 18:32 ` James Ausmus
2018-06-01 23:43 ` Paulo Zanoni
2018-06-14 19:24 ` Rodrigo Vivi
2018-06-15 0:45 ` Manasi Navare
2018-06-15 5:20 ` Rodrigo Vivi
2018-06-14 19:23 ` Rodrigo Vivi
2018-06-19 20:39 ` Manasi Navare
2018-05-24 23:42 ` [PATCH 27/24] drm/i915/dp: Add support for HBR3 and TPS4 during link training Paulo Zanoni
2018-05-25 18:41 ` James Ausmus
2018-05-24 23:42 ` [PATCH 28/24] drm/i915/icl: implement DVFS for ICL Paulo Zanoni
2018-06-14 19:47 ` Rodrigo Vivi
2018-05-24 23:42 ` [PATCH 29/24] drm/i915/icl: DP_AUX_E is valid on ICL+ Paulo Zanoni
2018-05-25 0:12 ` Paulo Zanoni
2018-06-11 23:01 ` Paulo Zanoni
2018-05-24 23:42 ` [PATCH 30/24] drm/i915/icl: update VBT's child_device_config flags2 field Paulo Zanoni
2018-06-14 19:33 ` Rodrigo Vivi
2018-05-25 0:36 ` [PATCH 25/24] drm/i915/icl: fix gmbus gpio pin mapping Lucas De Marchi
2018-05-25 16:24 ` Ville Syrjälä
2018-05-25 16:26 ` Lucas De Marchi
2018-06-14 19:28 ` Rodrigo Vivi
2018-06-14 19:07 ` Rodrigo Vivi
2018-06-14 20:43 ` Paulo Zanoni
2018-05-24 23:59 ` ✗ Fi.CI.CHECKPATCH: warning for More ICL display patches (rev7) Patchwork
2018-05-25 0:06 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-05-25 0:14 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-05-25 0:49 ` ✗ Fi.CI.BAT: failure for More ICL display patches (rev8) Patchwork
2018-05-25 20:11 ` ✗ Fi.CI.BAT: failure for More ICL display patches (rev11) Patchwork
2018-06-01 23:22 ` [PATCH 00/24] More ICL display patches Paulo Zanoni
2018-06-13 21:49 ` ✗ Fi.CI.BAT: failure for More ICL display patches (rev12) Patchwork
2018-06-14 20:20 ` ✗ Fi.CI.BAT: failure for More ICL display patches (rev13) Patchwork
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