From: Shashank Sharma <shashank.sharma@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v10 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4
Date: Tue, 14 Aug 2018 15:23:21 +0530 [thread overview]
Message-ID: <1534240406-10534-4-git-send-email-shashank.sharma@intel.com> (raw)
In-Reply-To: <1534240406-10534-1-git-send-email-shashank.sharma@intel.com>
This patch adds support for YCBCR 4:4:4 CRTC output format.
To do this, this patch extends the existing YCBCR 4:2:0
framework by:
- Adding new parameter in for YCBCR 4:4:4 enum crtc_iutput_format.
- Adding case for YCBCR 4:4:4 in while setting AVI infoframes.
- Adding necessary checks in modeset sequence.
V3: Added this patch in the series
V4: Added r-b from Maarten (for v3)
Addressed review comment from Ville:
Do not use (config->output_format > CRTC_OUTPUT_RGB)
V5: Rebase
V6: Rebase and small change, to accommodate changes in patch 2
V7: Fixed checkpatch alignment warnings
V8: Rebase
V9: Rebase
V10: Rebase
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Shashank Sharma <shashank.sharma@intel.com>
---
drivers/gpu/drm/i915/intel_color.c | 3 ++-
drivers/gpu/drm/i915/intel_display.c | 13 +++++++++----
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_hdmi.c | 2 ++
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index bf9d8f6..5127da2 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -149,7 +149,8 @@ static void ilk_load_csc_matrix(struct drm_crtc_state *crtc_state)
if (INTEL_GEN(dev_priv) >= 8 || IS_HASWELL(dev_priv))
limited_color_range = intel_crtc_state->limited_color_range;
- if (intel_crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ if (intel_crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
+ intel_crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) {
ilk_load_ycbcr_conversion_matrix(intel_crtc);
return;
} else if (crtc_state->ctm) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e2a1e4f..3384129 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6621,8 +6621,9 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
return -EINVAL;
}
- if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 &&
- pipe_config->base.ctm) {
+ if ((pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
+ pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) &&
+ pipe_config->base.ctm) {
/*
* There is only one pipe CSC unit per pipe, and we need that
* for output conversion from RGB->YCBCR. So if CTM is already
@@ -7842,6 +7843,8 @@ static void intel_get_crtc_ycbcr_config(struct intel_crtc *crtc,
output = INTEL_OUTPUT_FORMAT_INVALID;
else
output = INTEL_OUTPUT_FORMAT_YCBCR420;
+ } else {
+ output = INTEL_OUTPUT_FORMAT_YCBCR444;
}
}
}
@@ -8484,11 +8487,13 @@ static void haswell_set_pipemisc(struct drm_crtc *crtc)
if (intel_crtc->config->dither)
val |= PIPEMISC_DITHER_ENABLE | PIPEMISC_DITHER_TYPE_SP;
- if (config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
+ if (config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420 ||
+ config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444)
val |= PIPEMISC_OUTPUT_COLORSPACE_YUV;
+
+ if (config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
val |= PIPEMISC_YUV420_ENABLE |
PIPEMISC_YUV420_MODE_FULL_BLEND;
- }
I915_WRITE(PIPEMISC(intel_crtc->pipe), val);
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index cc7a46e..74ea4ac 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -712,6 +712,7 @@ enum intel_output_format {
INTEL_OUTPUT_FORMAT_INVALID,
INTEL_OUTPUT_FORMAT_RGB,
INTEL_OUTPUT_FORMAT_YCBCR420,
+ INTEL_OUTPUT_FORMAT_YCBCR444,
};
struct intel_crtc_state {
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index f1259a9..893d53d 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -488,6 +488,8 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
frame.avi.colorspace = HDMI_COLORSPACE_YUV420;
+ else if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444)
+ frame.avi.colorspace = HDMI_COLORSPACE_YUV444;
else
frame.avi.colorspace = HDMI_COLORSPACE_RGB;
--
2.7.4
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next prev parent reply other threads:[~2018-08-14 9:45 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-14 9:53 [PATCH v10 0/8] YCBCR 4:2:0/4:4:4 output support for LSPCON Shashank Sharma
2018-08-14 9:53 ` [PATCH v10 1/8] drm/i915: Introduce CRTC output format Shashank Sharma
2018-09-11 14:39 ` Ville Syrjälä
2018-08-14 9:53 ` [PATCH v10 2/8] drm/i915: Add CRTC output format YCBCR 4:2:0 Shashank Sharma
2018-09-11 14:53 ` Ville Syrjälä
2018-08-14 9:53 ` Shashank Sharma [this message]
2018-09-11 14:54 ` [PATCH v10 3/8] drm/i915: Add CRTC output format YCBCR 4:4:4 Ville Syrjälä
2018-08-14 9:53 ` [PATCH v10 4/8] drm/i915: Check LSPCON vendor OUI Shashank Sharma
2018-08-14 9:53 ` [PATCH v10 5/8] drm/i915: Add AVI infoframe support for LSPCON Shashank Sharma
2018-08-14 9:53 ` [PATCH v10 6/8] drm/i915: Write AVI infoframes for MCA LSPCON Shashank Sharma
2018-08-14 10:45 ` [PATCH v11 " Shashank Sharma
2018-08-14 9:53 ` [PATCH v10 7/8] drm/i915: Write AVI infoframes for Parade LSPCON Shashank Sharma
2018-08-14 9:53 ` [PATCH v10 8/8] drm/i915: Add YCBCR 4:2:0/4:4:4 support for LSPCON Shashank Sharma
2018-08-14 10:06 ` ✗ Fi.CI.CHECKPATCH: warning for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev11) Patchwork
2018-08-14 10:24 ` ✓ Fi.CI.BAT: success " Patchwork
2018-08-14 11:06 ` ✓ Fi.CI.BAT: success for YCBCR 4:2:0/4:4:4 output support for LSPCON (rev12) Patchwork
2018-08-14 11:54 ` ✓ Fi.CI.IGT: " Patchwork
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