[v7 16/16] drm/i915: Enable Plane CSC

Uma Shankar
2019-03-28T20:16:14Z

Implement plane CSC on ICL.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_color.c | 86 ++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_display.c | 3 ++
3 files changed, 90 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 657232bd..f82a5bc 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6750,6 +6750,7 @@ enum {
#define _PLANE_COLOR_CTL_3_A 0x703CC /* GLK+ */
#define PLANE_COLOR_PIPE_GAMMA_ENABLE (1 << 30) /* Pre-ICL */
#define PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE (1 << 28)
+#define PLANE_COLOR_PLANE_CSC_ENABLE (1 << 21) /* ICL+ */
#define PLANE_COLOR_INPUT_CSC_ENABLE (1 << 20) /* ICL+ */
#define PLANE_COLOR_PIPE_CSC_ENABLE (1 << 23) /* Pre-ICL */
#define PLANE_COLOR_CSC_MODE_BYPASS (0 << 17)
diff --git a/drivers/gpu/drm/i915/intel_color.c b/drivers/gpu/drm/i915/intel_color.c
index aa73f88..ed21d98 100644
--- a/drivers/gpu/drm/i915/intel_color.c
+++ b/drivers/gpu/drm/i915/intel_color.c
@@ -606,6 +606,90 @@ static void bdw_load_plane_gamma_lut(const struct drm_plane_state *state,
}
}

+static void icl_load_plane_csc_matrix(const struct drm_plane_state *state)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ u16 coeffs[9] = {};
+ u16 postoff = 0;
+ int i;
+
+ if (state->ctm) {
+ struct drm_color_ctm *ctm = state->ctm->data;
+ const u64 *input;
+
+ input = ctm->matrix;
+
+ /*
+ * Convert fixed point S31.32 input to format supported by the
+ * hardware.
+ */
+ for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
+ u64 abs_coeff = ((1ULL << 63) - 1) & input[i];
+
+ /*
+ * Clamp input value to min/max supported by
+ * hardware.
+ */
+ abs_coeff = clamp_val(abs_coeff, 0, CTM_COEFF_4_0 - 1);
+
+ /* sign bit */
+ if (CTM_COEFF_NEGATIVE(input[i]))
+ coeffs[i] |= 1 << 15;
+
+ if (abs_coeff < CTM_COEFF_0_125)
+ coeffs[i] |= (3 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 12);
+ else if (abs_coeff < CTM_COEFF_0_25)
+ coeffs[i] |= (2 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 11);
+ else if (abs_coeff < CTM_COEFF_0_5)
+ coeffs[i] |= (1 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 10);
+ else if (abs_coeff < CTM_COEFF_1_0)
+ coeffs[i] |= ILK_CSC_COEFF_FP(abs_coeff, 9);
+ else if (abs_coeff < CTM_COEFF_2_0)
+ coeffs[i] |= (7 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 8);
+ else
+ coeffs[i] |= (6 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 7);
+ }
+ } else {
+ /*
+ * Load an identity matrix if no coefficients are provided.
+ *
+ * TODO: Check what kind of values actually come out of the
+ * pipe with these coeff/postoff values and adjust to get the
+ * best accuracy. Perhaps we even need to take the bpc value
+ * into consideration.
+ */
+ for (i = 0; i < 3; i++)
+ coeffs[i * 3 + i] = ILK_CSC_COEFF_1_0;
+ }
+
+ I915_WRITE(PLANE_CSC_COEFF(pipe, plane, 0),
+ coeffs[0] << 16 | coeffs[1]);
+ I915_WRITE(PLANE_CSC_COEFF(pipe, plane, 1), coeffs[2] << 16);
+
+ I915_WRITE(PLANE_CSC_COEFF(pipe, plane, 3),
+ coeffs[3] << 16 | coeffs[4]);
+ I915_WRITE(PLANE_CSC_COEFF(pipe, plane, 4), coeffs[5] << 16);
+
+ I915_WRITE(PLANE_CSC_COEFF(pipe, plane, 5),
+ coeffs[6] << 16 | coeffs[7]);
+ I915_WRITE(PLANE_CSC_COEFF(pipe, plane, 6), coeffs[8] << 16);
+
+ I915_WRITE(PLANE_CSC_PREOFF(pipe, plane, 0), 0);
+ I915_WRITE(PLANE_CSC_PREOFF(pipe, plane, 1), 0);
+ I915_WRITE(PLANE_CSC_PREOFF(pipe, plane, 2), 0);
+
+ I915_WRITE(PLANE_CSC_POSTOFF(pipe, plane, 0), postoff);
+ I915_WRITE(PLANE_CSC_POSTOFF(pipe, plane, 1), postoff);
+ I915_WRITE(PLANE_CSC_POSTOFF(pipe, plane, 2), postoff);
+}
+
/* Loads the palette/gamma unit for the CRTC on Broadwell+. */
static void broadwell_load_plane_luts(const struct drm_plane_state *state)
{
@@ -777,6 +861,8 @@ static void icl_load_plane_luts(const struct drm_plane_state *state)

plane_state->gamma_mode |= PLANE_COLOR_PLANE_PRECSC_GAMMA_ENABLE;
plane_state->gamma_mode |= ~PLANE_COLOR_PLANE_GAMMA_DISABLE;
+
+ icl_load_plane_csc_matrix(state);
}

static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6b37052..83c9d51 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3834,6 +3834,9 @@ u32 glk_plane_color_ctl(const struct intel_crtc_state *crtc_state,
plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
}

+ if (plane_state->base.ctm)
+ plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
+
return plane_color_ctl;
}

--
1.9.1

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