✗ Fi.CI.CHECKPATCH: warning for i915 vgpu PV to improve vgpu performance

Patchwork
2019-09-17T06:12:53Z

== Series Details ==

Series: i915 vgpu PV to improve vgpu performance
URL : https://patchwork.freedesktop.org/series/66787/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
16a1cd5cf965 drm/i915: introduced vgpu pv capability
-:125: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#125: FILE: drivers/gpu/drm/i915/i915_vgpu.c:325:
+bool intel_vgpu_check_pv_caps(struct drm_i915_private *dev_priv,
+ void __iomem *shared_area)

-:163: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#163: FILE: drivers/gpu/drm/i915/i915_vgpu.h:57:
+bool intel_vgpu_check_pv_caps(struct drm_i915_private *dev_priv,
+ void __iomem *shared_area);

total: 0 errors, 0 warnings, 2 checks, 107 lines checked
a176f82a8fcd drm/i915: vgpu shared memory setup for pv optimization
-:114: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#114: FILE: drivers/gpu/drm/i915/i915_vgpu.c:329:
+static int intel_vgpu_setup_shared_page(struct drm_i915_private *dev_priv,
+ void __iomem *shared_area)

-:172: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*pv)...) over kzalloc(sizeof(struct i915_virtual_gpu_pv)...)
#172: FILE: drivers/gpu/drm/i915/i915_vgpu.c:387:
+ pv = kzalloc(sizeof(struct i915_virtual_gpu_pv), GFP_KERNEL);

total: 0 errors, 0 warnings, 2 checks, 172 lines checked
afd40d2ba3c1 drm/i915: vgpu pv command buffer support
-:51: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#51: FILE: drivers/gpu/drm/i915/i915_vgpu.c:342:
+static int wait_for_desc_update(struct vgpu_pv_ct_buffer_desc *desc,
+ u32 fence, u32 *status)

-:63: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#63: FILE: drivers/gpu/drm/i915/i915_vgpu.c:354:
+ DRM_ERROR("CT: fence %u failed; reported fence=%u\n",
+ fence, desc->fence);

-:88: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#88: FILE: drivers/gpu/drm/i915/i915_vgpu.c:379:
+static int pv_command_buffer_write(struct i915_virtual_gpu_pv *pv,
+ const u32 *action, u32 len /* in dwords */, u32 fence)

-:151: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#151: FILE: drivers/gpu/drm/i915/i915_vgpu.c:442:
+static int pv_send(struct drm_i915_private *dev_priv,
+ const u32 *action, u32 len, u32 *status)

-:186: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#186: FILE: drivers/gpu/drm/i915/i915_vgpu.c:477:
+static int intel_vgpu_pv_send_command_buffer(

-:203: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#203: FILE: drivers/gpu/drm/i915/i915_vgpu.c:494:
+ DRM_ERROR("PV: send action %#x returned %d (%#x)\n",
+ action[0], ret, ret);

-:226: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#226: FILE: drivers/gpu/drm/i915/i915_vgpu.c:582:
+ pv->ctb.desc->size = PAGE_SIZE/2;
^

-:245: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#245: FILE: drivers/gpu/drm/i915/i915_vgpu.h:32:
+#define PV_DESC_OFF (PAGE_SIZE/4)
^

-:246: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#246: FILE: drivers/gpu/drm/i915/i915_vgpu.h:33:
+#define PV_CMD_OFF (PAGE_SIZE/2)
^

-:323: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#323: FILE: drivers/gpu/drm/i915/i915_vgpu.h:131:
+intel_vgpu_pv_send(struct drm_i915_private *dev_priv,
+ u32 *action, u32 len)

total: 0 errors, 0 warnings, 10 checks, 299 lines checked
73862271b37e drm/i915: vgpu ppgtt update pv optimization
-:42: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#42: FILE: drivers/gpu/drm/i915/i915_gem.c:1313:
+ if ((intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv))
+ || intel_vgpu_enabled_pv_caps(dev_priv, PV_PPGTT_UPDATE))

-:56: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#56: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1019:
+void gen8_ppgtt_clear(struct i915_address_space *vm,
u64 start, u64 length)

-:65: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1130:
+int gen8_ppgtt_alloc(struct i915_address_space *vm,
u64 start, u64 length)

-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#74: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1330:
+void gen8_ppgtt_insert(struct i915_address_space *vm,
struct i915_vma *vma,

-:98: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#98: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:592:
+void gen8_ppgtt_clear(struct i915_address_space *vm,
+ u64 start, u64 length);

-:100: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#100: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:594:
+void gen8_ppgtt_insert(struct i915_address_space *vm,
+ struct i915_vma *vma,

-:103: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#103: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:597:
+int gen8_ppgtt_alloc(struct i915_address_space *vm,
+ u64 start, u64 length);

-:127: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#127: FILE: drivers/gpu/drm/i915/i915_vgpu.c:329:
+static int vgpu_ppgtt_pv_update(struct drm_i915_private *dev_priv,
+ u32 action, u64 pdp, u64 start, u64 length, u32 cache_level)

-:144: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#144: FILE: drivers/gpu/drm/i915/i915_vgpu.c:346:
+static void gen8_ppgtt_clear_4lvl_pv(struct i915_address_space *vm,
+ u64 start, u64 length)

-:151: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#151: FILE: drivers/gpu/drm/i915/i915_vgpu.c:353:
+ vgpu_ppgtt_pv_update(dev_priv, PV_ACTION_PPGTT_L4_CLEAR,
+ px_dma(ppgtt->pd), start, length, 0);

-:155: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#155: FILE: drivers/gpu/drm/i915/i915_vgpu.c:357:
+static void gen8_ppgtt_insert_4lvl_pv(struct i915_address_space *vm,
+ struct i915_vma *vma,

-:165: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#165: FILE: drivers/gpu/drm/i915/i915_vgpu.c:367:
+ vgpu_ppgtt_pv_update(dev_priv, PV_ACTION_PPGTT_L4_INSERT,
+ px_dma(ppgtt->pd), start, length, cache_level);

-:169: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#169: FILE: drivers/gpu/drm/i915/i915_vgpu.c:371:
+static int gen8_ppgtt_alloc_4lvl_pv(struct i915_address_space *vm,
+ u64 start, u64 length)

-:187: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#187: FILE: drivers/gpu/drm/i915/i915_vgpu.c:389:
+void intel_vgpu_config_pv_caps(struct drm_i915_private *dev_priv,
+ enum pv_caps cap, void *data)

-:237: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#237: FILE: drivers/gpu/drm/i915/i915_vgpu.h:140:
+intel_vgpu_enabled_pv_caps(struct drm_i915_private *dev_priv,
+ enum pv_caps cap)

-:240: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#240: FILE: drivers/gpu/drm/i915/i915_vgpu.h:143:
+ return (dev_priv->vgpu.active) && intel_vgpu_has_pv_caps(dev_priv)
+ && (dev_priv->vgpu.pv_caps & cap);

-:251: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#251: FILE: drivers/gpu/drm/i915/i915_vgpu.h:166:
+void intel_vgpu_config_pv_caps(struct drm_i915_private *dev_priv,
+ enum pv_caps cap, void *data);

total: 0 errors, 0 warnings, 17 checks, 190 lines checked
2c3dc08988b7 drm/i915: vgpu context submission pv optimization
-:136: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#136: FILE: drivers/gpu/drm/i915/i915_vgpu.h:33:
+#define PV_ELSP_OFF (PAGE_SIZE/8)
^

-:164: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#164: FILE: drivers/gpu/drm/i915/i915_vgpu.h:67:
+ spinlock_t lock;

-:187: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#187:
new file mode 100644

-:220: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#220: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:29:
+static void pv_submit(struct intel_engine_cs *engine,
+ struct i915_request **out,

-:249: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#249: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:58:
+
+}

-:293: CHECK:LINE_SPACING: Please don't use multiple blank lines
#293: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:102:
+
+

-:481: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#481: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:290:
+ engine->park = engine->unpark = NULL;

total: 0 errors, 1 warnings, 6 checks, 423 lines checked
5dc5073bd1dc drm/i915/gvt: GVTg handle pv_caps PVINFO register
46ef167fec9f drm/i915/gvt: GVTg handle shared_page setup
-:51: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#51: FILE: drivers/gpu/drm/i915/gvt/gvt.h:697:
+int intel_gvt_read_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len);

-:53: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#53: FILE: drivers/gpu/drm/i915/gvt/gvt.h:699:
+int intel_gvt_write_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len);

-:131: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#131: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:601:
+int intel_gvt_read_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len)

-:150: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#150: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:620:
+int intel_gvt_write_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len)

total: 0 errors, 0 warnings, 4 checks, 122 lines checked
ac05391ac0b1 drm/i915/gvt: GVTg support ppgtt pv optimization
-:83: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#83: FILE: drivers/gpu/drm/i915/gvt/gtt.c:1836:
+ gvt_vgpu_err("fail to create ppgtt for pdp 0x%llx\n",
+ px_dma(mm->ppgtt->pd));

-:122: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#122: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2886:
+#define pml4_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PML4E_SIZE) & GEN8_PML4E_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})

-:128: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#128: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2892:
+#define pdp_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PDPE_SIZE) & GEN8_PDPE_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})

-:134: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#134: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2898:
+#define pd_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PDE_SIZE) & GEN8_PDE_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})

-:147: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#147: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2911:
+static int walk_pt_range(struct intel_vgpu *vgpu, u64 pt,
+ u64 start, u64 end, struct ppgtt_walk *walk)

-:160: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#160: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2924:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pt & PAGE_MASK) + (start_index << info->gtt_entry_size_shift),

-:181: CHECK:LINE_SPACING: Please don't use multiple blank lines
#181: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2945:
+
+

-:183: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#183: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2947:
+static int walk_pd_range(struct intel_vgpu *vgpu, u64 pd,
+ u64 start, u64 end, struct ppgtt_walk *walk)

-:195: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#195: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2959:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pd & PAGE_MASK) + (index <<

-:208: CHECK:LINE_SPACING: Please don't use multiple blank lines
#208: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2972:
+
+

-:210: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#210: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2974:
+static int walk_pdp_range(struct intel_vgpu *vgpu, u64 pdp,
+ u64 start, u64 end, struct ppgtt_walk *walk)

-:222: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#222: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2986:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pdp & PAGE_MASK) + (index <<

-:234: CHECK:LINE_SPACING: Please don't use multiple blank lines
#234: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2998:
+
+

-:236: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#236: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3000:
+static int walk_pml4_range(struct intel_vgpu *vgpu, u64 pml4,
+ u64 start, u64 end, struct ppgtt_walk *walk)

-:247: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#247: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3011:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pml4 & PAGE_MASK) + (index <<

-:260: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#260: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3024:
+static int intel_vgpu_pv_ppgtt_insert_4lvl(struct intel_vgpu *vgpu,
+ struct intel_vgpu_mm *mm,

-:278: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#278: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3042:
+ walk.mfns = kmalloc_array(num_pages,
+ sizeof(unsigned long), GFP_KERNEL);

-:323: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#323: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3087:
+int intel_vgpu_handle_pv_ppgtt_update(struct intel_vgpu *vgpu,
+ u32 action, struct pv_ppgtt_update *pv_ppgtt)

-:355: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#355: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3119:
+ ret = intel_vgpu_pv_ppgtt_insert_4lvl(vgpu, mm,
+ pdp, start, length, cache_level);

-:394: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#394: FILE: drivers/gpu/drm/i915/gvt/gtt.h:291:
+int intel_vgpu_handle_pv_ppgtt_update(struct intel_vgpu *vgpu,
+ u32 action, struct pv_ppgtt_update *pv_ppgtt);

-:404: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'vgpu' - possible side-effects?
#404: FILE: drivers/gpu/drm/i915/gvt/gvt.h:56:
+#define VGPU_PVCAP(vgpu, cap) \
+ ((vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) & (cap)) \
+ && vgpu->shared_page_enabled)

-:406: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#406: FILE: drivers/gpu/drm/i915/gvt/gvt.h:58:
+ ((vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) & (cap)) \
+ && vgpu->shared_page_enabled)

-:430: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#430: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1223:
+static int fetch_pv_command_buffer(struct intel_vgpu *vgpu,
+ struct vgpu_pv_ct_buffer_desc *desc,

-:451: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#451: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1244:
+ head = desc->head/4;
^

-:452: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#452: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1245:
+ tail = desc->tail/4;
^

-:453: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#453: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1246:
+ size = desc->size/4;
^

-:497: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#497: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1290:
+ ret = intel_gvt_read_shared_page(vgpu, off, &data[avail],
+ (len - avail) * 4);

-:536: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#536: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1329:
+ ret = intel_gvt_write_shared_page(vgpu, PV_DESC_OFF,
+ &desc, sizeof(desc));

total: 0 errors, 0 warnings, 28 checks, 521 lines checked
070b7a4248c9 drm/i915/gvt: GVTg support context submission pv optimization
-:72: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#72: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1826:
+ if (intel_gvt_read_shared_page(vgpu, desc_off,
+ &execlist->elsp_dwords.data, 16))

-:93: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#93: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1850:
+ if (VGPU_PVCAP(vgpu, PV_SUBMISSION) &&
+ data == PV_ACTION_ELSP_SUBMISSION)

total: 0 errors, 0 warnings, 2 checks, 69 lines checked