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Please split. > >Do you mean changing the call site of intel_dmc_wl_init() as being >non-functional? Or is it something else? Jani, I'll send a v2 soon-ish. I'll go ahead and assume the anwser for the above is the former. Please stop me if otherwise :-) -- Gustavo Sousa > >If this is about the former, I would argue that's not really >non-functional, because we are changing the order of how things are >done... But if making that a standalone patch is preferred, I can do >that. > >-- >Gustavo Sousa > >> >>BR, >>Jani. >> >>> >>> Signed-off-by: Gustavo Sousa >>> --- >>> drivers/gpu/drm/i915/display/intel_display_device.h | 1 + >>> drivers/gpu/drm/i915/display/intel_display_driver.c | 2 +- >>> drivers/gpu/drm/i915/display/intel_dmc_wl.c | 4 ++-- >>> 3 files changed, 4 insertions(+), 3 deletions(-) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/driv= ers/gpu/drm/i915/display/intel_display_device.h >>> index 071a36b51f79..5f78fd127fe0 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h >>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h >>> @@ -128,6 +128,7 @@ enum intel_display_subplatform { >>> #define HAS_DDI(i915) (DISPLAY_INFO(i915)->has_= ddi) >>> #define HAS_DISPLAY(i915) (DISPLAY_RUNTIME_INFO(i915)->= pipe_mask !=3D 0) >>> #define HAS_DMC(i915) (DISPLAY_RUNTIME_INFO(i91= 5)->has_dmc) >>> +#define HAS_DMC_WAKELOCK(i915) (HAS_DMC(i915) && DISPLA= Y_VER(i915) >=3D 20) >>> #define HAS_DOUBLE_BUFFERED_M_N(i915) (DISPLAY_VER(i915) >=3D 9= || IS_BROADWELL(i915)) >>> #define HAS_DP_MST(i915) (DISPLAY_INFO(i915)->has_dp_ms= t) >>> #define HAS_DP20(i915) (IS_DG2(i915) || DISPLAY= _VER(i915) >=3D 14) >>> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/driv= ers/gpu/drm/i915/display/intel_display_driver.c >>> index 673f9b965494..8afaa9cb89d2 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c >>> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c >>> @@ -200,7 +200,6 @@ void intel_display_driver_early_probe(struct drm_i9= 15_private *i915) >>> intel_dpll_init_clock_hook(i915); >>> intel_init_display_hooks(i915); >>> intel_fdi_init_hook(i915); >>> - intel_dmc_wl_init(&i915->display); >>> } >>> =20 >>> /* part #1: call before irq install */ >>> @@ -238,6 +237,7 @@ int intel_display_driver_probe_noirq(struct drm_i91= 5_private *i915) >>> return 0; >>> =20 >>> intel_dmc_init(display); >>> + intel_dmc_wl_init(display); >>> =20 >>> i915->display.wq.modeset =3D alloc_ordered_workqueue("i915_mod= eset", 0); >>> i915->display.wq.flip =3D alloc_workqueue("i915_flip", WQ_HIGH= PRI | >>> diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/= drm/i915/display/intel_dmc_wl.c >>> index 8283b607aac4..f6ec79b0e39d 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c >>> +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c >>> @@ -250,7 +250,7 @@ static bool intel_dmc_wl_check_range(struct intel_d= isplay *display, u32 address) >>> =20 >>> static bool __intel_dmc_wl_supported(struct intel_display *display) >>> { >>> - if (DISPLAY_VER(display) < 20 || >>> + if (!HAS_DMC_WAKELOCK(display) || >>> !intel_dmc_has_payload(display) || >>> !display->params.enable_dmc_wl) >>> return false; >>> @@ -263,7 +263,7 @@ void intel_dmc_wl_init(struct intel_display *displa= y) >>> struct intel_dmc_wl *wl =3D &display->wl; >>> =20 >>> /* don't call __intel_dmc_wl_supported(), DMC is not loaded ye= t */ >>> - if (DISPLAY_VER(display) < 20 || !display->params.enable_dmc_w= l) >>> + if (!HAS_DMC_WAKELOCK(display) || !display->params.enable_dmc_= wl) >>> return; >>> =20 >>> INIT_DELAYED_WORK(&wl->work, intel_dmc_wl_work); >> >>--=20 >>Jani Nikula, Intel