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From: "Shankar, Uma" <uma.shankar@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder intel_dp_compute_config() a bit
Date: Fri, 1 Apr 2022 06:26:50 +0000	[thread overview]
Message-ID: <1b575d73e205472dafb0aee1d42d7ac4@intel.com> (raw)
In-Reply-To: <20220322120015.28074-6-ville.syrjala@linux.intel.com>



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Tuesday, March 22, 2022 5:30 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder
> intel_dp_compute_config() a bit
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Consolidate the double pfit call, and reorder things so that
> intel_dp_output_format() and intel_dp_compute_link_config() are back-to-back.
> They are intimately related, and will need to be called twice to properly handle the
> "4:2:0 also" modes.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++-------------
>  1 file changed, 10 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 9720571438e9..a655af1ab359 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1832,15 +1832,6 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  	if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port !=
> PORT_A)
>  		pipe_config->has_pch_encoder = true;
> 
> -	pipe_config->output_format = intel_dp_output_format(&intel_connector-
> >base,
> -							    adjusted_mode);
> -
> -	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> -		ret = intel_panel_fitting(pipe_config, conn_state);
> -		if (ret)
> -			return ret;
> -	}
> -
>  	pipe_config->has_audio = intel_dp_has_audio(encoder, pipe_config,
> conn_state);
> 
>  	fixed_mode = intel_panel_fixed_mode(intel_connector, adjusted_mode);
> @@ -1848,10 +1839,6 @@ intel_dp_compute_config(struct intel_encoder
> *encoder,
>  		ret = intel_panel_compute_config(intel_connector,
> adjusted_mode);
>  		if (ret)
>  			return ret;
> -
> -		ret = intel_panel_fitting(pipe_config, conn_state);
> -		if (ret)
> -			return ret;
>  	}
> 
>  	if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) @@ -1867,10
> +1854,20 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  	if (intel_dp_hdisplay_bad(dev_priv, adjusted_mode->crtc_hdisplay))
>  		return -EINVAL;
> 
> +	pipe_config->output_format = intel_dp_output_format(&intel_connector-
> >base,
> +							    adjusted_mode);
> +
>  	ret = intel_dp_compute_link_config(encoder, pipe_config, conn_state);
>  	if (ret < 0)
>  		return ret;
> 
> +	if ((intel_dp_is_edp(intel_dp) && fixed_mode) ||
> +	    pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
> +		ret = intel_panel_fitting(pipe_config, conn_state);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	pipe_config->limited_color_range =
>  		intel_dp_limited_color_range(pipe_config, conn_state);
> 
> --
> 2.34.1


  reply	other threads:[~2022-04-01  6:26 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-22 12:00 [Intel-gfx] [PATCH v2 00/12] drm/i915: Fix up DP DFP 4:2:0 handling more Ville Syrjala
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 01/12] drm/i915/dp: Extract intel_dp_tmds_clock_valid() Ville Syrjala
2022-04-01  6:19   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 02/12] drm/i915/dp: Respect the sink's max TMDS clock when dealing with DP->HDMI DFPs Ville Syrjala
2022-04-01  6:21   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 03/12] drm/i915/dp: Extract intel_dp_has_audio() Ville Syrjala
2022-04-01  6:22   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 04/12] drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/ Ville Syrjala
2022-04-01  6:24   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 05/12] drm/i915/dp: Reorder intel_dp_compute_config() a bit Ville Syrjala
2022-04-01  6:26   ` Shankar, Uma [this message]
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 06/12] drm/i915/dp: Pass around intel_connector rather than drm_connector Ville Syrjala
2022-04-01  6:27   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 07/12] drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also" modes Ville Syrjala
2022-04-01  6:28   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 08/12] drm/i915/dp: Rework HDMI DFP TMDS clock handling Ville Syrjala
2022-04-01  6:38   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 09/12] drm/i915/dp: Add support for "4:2:0 also" modes for DP Ville Syrjala
2022-04-01  6:40   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 10/12] drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP HDMI DFPs Ville Syrjala
2022-04-01  6:45   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 11/12] drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix Ville Syrjala
2022-04-01  6:56   ` Shankar, Uma
2022-03-22 12:00 ` [Intel-gfx] [PATCH v2 12/12] drm/i915/dp: Disable DFP RGB->YCbCr conversion for now Ville Syrjala
2022-04-01  7:00   ` Shankar, Uma
2022-04-05 18:18     ` Ville Syrjälä
2022-03-22 12:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Fix up DP DFP 4:2:0 handling more (rev2) Patchwork
2022-03-22 13:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-22 19:34 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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