From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH 0/4] Haswell GPU hang fixes Date: Fri, 17 Aug 2012 15:53:53 -0700 Message-ID: <1f4d08b1efee07ec02fb5d2c7f27636a@bwidawsk.net> References: <1345239344-9968-1-git-send-email-przanoni@gmail.com> <7a88f53ae1de002fedf2a631b439adb1@bwidawsk.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from shiva.chad-versace.us (209-20-75-48.static.cloud-ips.com [209.20.75.48]) by gabe.freedesktop.org (Postfix) with ESMTP id CA7D29E83E for ; Fri, 17 Aug 2012 15:53:52 -0700 (PDT) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Paulo Zanoni Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni List-Id: intel-gfx@lists.freedesktop.org On 2012-08-17 15:42, Paulo Zanoni wrote: > 2012/8/17 Ben Widawsky : >> On 2012-08-17 14:35, Paulo Zanoni wrote: >>> >>> From: Paulo Zanoni >>> >>> Hi >>> >>> Since we stopped running the gen6 workarounds on gen > 6 I started >>> seeing a lot >>> of GPU hangs on my gen 7.5 machine. These patches add gen7+ >>> workarounds >>> which >>> prevent the GPU hangs I'm seeing. >>> >>> These patches were tested mostly on HSW and briefly on IVB, but the >>> workarounds >>> implemented are documented for both. This is also the first time I >>> touch >>> this >>> kind of code, so extra careful reviewing might be needed. >>> >>> Thanks, >>> Paulo >>> >>> >>> Paulo Zanoni (4): >>> drm/i915: add gen7_render_ring_flush >>> drm/i915: add workarounds directly to gen6_render_ring_flush >>> drm/i915: add workaround to gen7_render_ring_flush >>> drm/i915: add one more workaround to gen7_render_ring_flush >>> >>> drivers/gpu/drm/i915/intel_ringbuffer.c | 81 >>> ++++++++++++++++++++++++++++++--- >>> 1 file changed, 74 insertions(+), 7 deletions(-) >> >> >> I don't think this makes for ideal bisection. I'd rather you >> implement the >> ring flush + workarounds before you set the pointer. If you want to >> keep the >> patches split out like this, just add a 5 patch to do the pointer >> change >> that's in the first patch. Or else collapse patch 1, 3, 4 into 1. > > But currently gen7 is *already* not running any of the workarounds... > Patch 1 does not introduce any real difference (neither adds nor > removes bugs), patch 2 also does not change anything. Only patches 3 > and 4 start to fix the bugs that were already present before the > series. > I guess I thought the patches would be, revert Chris patch to separate out the workaround, then add IVB specific flush. So now I see you've done things slightly differently. Sorry for the rushed comments. Also this doesn't fix my platform :/ > >> >> I didn't really review anything yet though. >> >> -- >> Ben Widawsky, Intel Open Source Technology Center -- Ben Widawsky, Intel Open Source Technology Center