From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zhenyu Wang Subject: Re: [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake. Date: Thu, 5 Aug 2010 09:11:26 +0800 Message-ID: <20100805011126.GA780@zhen-devel.sh.intel.com> References: <1280930641-24502-1-git-send-email-chris@chris-wilson.co.uk> Reply-To: Zhenyu Wang Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0851928744==" Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 216859E734 for ; Wed, 4 Aug 2010 18:11:28 -0700 (PDT) In-Reply-To: <1280930641-24502-1-git-send-email-chris@chris-wilson.co.uk> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0851928744== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="7AUc2qLy4jB3hD7Z" Content-Disposition: inline --7AUc2qLy4jB3hD7Z Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On 2010.08.04 15:04:01 +0100, Chris Wilson wrote: > Signed-off-by: Chris Wilson > --- > drivers/gpu/drm/i915/i915_drv.h | 2 + > drivers/gpu/drm/i915/intel_display.c | 16 +++---- > drivers/gpu/drm/i915/intel_lvds.c | 70 ++++++++++++++++++++++++++++= ++++-- > 3 files changed, 75 insertions(+), 13 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index ad8dab5..6da15d8 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -610,6 +610,8 @@ typedef struct drm_i915_private { > struct sdvo_device_mapping sdvo_mappings[2]; > /* indicate whether the LVDS_BORDER should be enabled or not */ > unsigned int lvds_border_bits; > + /* Panel fitter placement and size for Ironlake+ */ > + u32 pch_pf_pos, pch_pf_size; > =20 > struct drm_crtc *plane_to_crtc_mapping[2]; > struct drm_crtc *pipe_to_crtc_mapping[2]; > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/= intel_display.c > index 07f893f..9b5fab4 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1914,15 +1914,13 @@ static void ironlake_crtc_dpms(struct drm_crtc *c= rtc, int mode) > /* Enable panel fitting for LVDS */ > if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) > || HAS_eDP || intel_pch_has_edp(crtc)) { > - temp =3D I915_READ(pf_ctl_reg); > - I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3); > - > - /* currently full aspect */ > - I915_WRITE(pf_win_pos, 0); > - > - I915_WRITE(pf_win_size, > - (dev_priv->panel_fixed_mode->hdisplay << 16) | > - (dev_priv->panel_fixed_mode->vdisplay)); > + if (dev_priv->pch_pf_size) { > + temp =3D I915_READ(pf_ctl_reg); > + I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3); > + I915_WRITE(pf_win_pos, dev_priv->pch_pf_pos); > + I915_WRITE(pf_win_size, dev_priv->pch_pf_size); > + } else > + I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE); > } So this breaks panel fitting setting on eDP... --=20 Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827 --7AUc2qLy4jB3hD7Z Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iEYEARECAAYFAkxaD74ACgkQsQQaM014GCeDfwCgiO48Bc1O93HCxvmb+WLZ4OZ9 WZEAnj+9CFmz7CJWtoZYpRvxyPqDlZ83 =XD87 -----END PGP SIGNATURE----- --7AUc2qLy4jB3hD7Z-- --===============0851928744== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0851928744==--