From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: [RFC] drm/i915: context support unit test-r2 Date: Fri, 14 Jan 2011 23:28:28 -0800 Message-ID: <20110115072828.GA20773@lundgren.kumite> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="UugvWAfsgieZRqgk" Return-path: Received: from mail-iw0-f177.google.com (mail-iw0-f177.google.com [209.85.214.177]) by gabe.freedesktop.org (Postfix) with ESMTP id 876379E733 for ; Fri, 14 Jan 2011 23:28:34 -0800 (PST) Received: by iwn38 with SMTP id 38so3320675iwn.36 for ; Fri, 14 Jan 2011 23:28:34 -0800 (PST) Content-Disposition: inline List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: benjamin.widawsky@linux.intel.com List-Id: intel-gfx@lists.freedesktop.org --UugvWAfsgieZRqgk Content-Type: text/plain; charset=us-ascii Content-Disposition: inline I've been sitting on this for over a week now. I figure I may as well post this since I've been working on the implementation in libdrm and the driver for the last week, although because of a bunch of bureaucratic distractions this week, it amounted to only a day's worth of work :P. The changes basically implemented the slot mechanism that Daniel and Kristian recommended. I'll admit that even this basic unit test has changed a few times in the last few days, but it's pretty simple, and shows the basic idea. Most of the implementation details of the ctx related functions are missing, but I think the names are descriptive enough. Let me know if more details are needed, and I can add them. I'd like to keep the implementation details such as, how I'll be pinning the HW context memory, out of the API discussion - which is the direction that I'd like this thread to move towards. As a final note, the test copied the bad_blit test, which was the easiest for me to reuse. I think blit is a really poor example for context support, but it's also much easier for non-graphics people like myself to understand. Ben --UugvWAfsgieZRqgk Content-Type: text/x-c; charset=unknown-8bit Content-Disposition: attachment; filename="gem_ctx_basic.c" Content-Transfer-Encoding: quoted-printable /* * Copyright =C2=A9 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"= ), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS = OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTH= ER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEAL= INGS * IN THE SOFTWARE. */ #include "drmtest.h" #include "intel_batchbuffer.h" #include "intel_gpu_tools.h" #include "drm.h" #include "i915_drm.h" #include "intel_bufmgr.h" #include "intel_context.h" static drm_intel_bufmgr *bufmgr; static drm_intel_ctx *ctx; struct intel_batchbuffer *batch; /* Would normally malloc this */ #define MAX_BOS_PER_BATCH 2 static drm_intel_ctx_flags ctx_flags[MAX_BOS_PER_BATCH]; #define RSVD_BUF_SLOT 0 #define SRC_BUF_SLOT 1 #define DEST_BUF_SLOT 2 /* XXX: We'll turn on ppgtt, but it's real usage won't get until gen7 */ #undef USE_PPGTT static void fill_ctx_bo_data(int which, drm_intel_bo *bo, int slot, unsigned long addr) { if (addr !=3D 0) { printf("Warning, PPGTT/user controlled relocations are not yet" " supported\n"); } /* XXX: reference to the bo handle */ ctx_flags[which].bo =3D bo; /* XXX: which slot the dest buffer refers to in the context */ ctx_flags[which].slot =3D slot; /* XXX: place to put the buffer (ppgtt only) */ ctx_flags[which].addr =3D addr; /* XXX: domains */ ctx_flags[which].read_domain =3D I915_GEM_DOMAIN_RENDER; ctx_flags[which].write_domain =3D 0; /* XXX: what else? */ //drm_intel_ctx_set_cmd(&ctx_flags[which], CTX_BUF_ASSOCIATE); ctx_flags[which].command =3D CTX_BUF_ASSOCIATE; } static void blit(drm_intel_bo *src_bo, drm_intel_bo *dest_bo) { uint32_t src_pitch =3D 512, dst_pitch =3D 512; uint32_t cmd_bits =3D 0; /* XXX: populate context info for the src and dest buffers */ fill_ctx_bo_data(0, dest_bo, DEST_BUF_SLOT, 0x1000); fill_ctx_bo_data(1, src_bo, SRC_BUF_SLOT, 0x8000); drm_intel_ctx_set_flag_count(ctx, 2); BEGIN_BATCH(8); OUT_BATCH(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB | cmd_bits); OUT_BATCH((3 << 24) | /* 32 bits */ (0xcc << 16) | /* copy ROP */ dst_pitch); OUT_BATCH(0); /* dst x1,y1 */ OUT_BATCH((64 << 16) | 64); /* 64x64 blit */ #ifdef USE_PPGTT OUT_BATCH(ctx_flags[0].addr); #else OUT_RELOC(dest_bo, I915_GEM_DOMAIN_RENDER, 0, 0); #endif OUT_BATCH(0); /* src x1,y1 */ OUT_BATCH(src_pitch); #ifdef USE_PPGTT OUT_BATCH(ctx_flags[1].addr); #else OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0); #endif ADVANCE_BATCH(); /* XXX: new flush with context data, where ctx has a pointer * to the array of information per buffer object */ intel_batchbuffer_flush_with_ctx(batch, ctx); } int main(int argc, char **argv) { drm_intel_bo *src, *dest; int fd; const unsigned int aperture_size =3D 64 * 1024 * 1024; /* XXX rsvd slot + src slot + dest slot */ const int ctx_bo_slots =3D 3; fd =3D drm_open_any(); bufmgr =3D drm_intel_bufmgr_gem_init(fd, 4096); drm_intel_bufmgr_set_debug(bufmgr, 1); drm_intel_bufmgr_gem_enable_reuse(bufmgr); /* XXX: Create a new context for our work 64MB aperture, 3 slots*/ ctx =3D drm_intel_ctx_gem_init(bufmgr, aperture_size, ctx_bo_slots); if (ctx =3D=3D NULL) return -1; /* XXX: associate the flags per bo with the context */ drm_intel_ctx_set_flags(ctx, ctx_flags); batch =3D intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd)); src =3D drm_intel_bo_alloc(bufmgr, "src", 128 * 128, 4096); dest =3D drm_intel_bo_alloc(bufmgr, "dest", 128 * 128, 4096); blit(src, dest); intel_batchbuffer_free(batch); drm_intel_ctx_gem_destroy(ctx); drm_intel_bufmgr_destroy(bufmgr); close(fd); return 0; } --UugvWAfsgieZRqgk Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --UugvWAfsgieZRqgk--